arch/mips/sgi-ip30/ip30-console.c
Source file repositories/reference/linux-study-clean/arch/mips/sgi-ip30/ip30-console.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/sgi-ip30/ip30-console.c- Extension
.c- Size
- 466 bytes
- Lines
- 26
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/io.hlinux/processor.hasm/sn/ioc3.hasm/setup.h
Detected Declarations
function prom_putchar
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <linux/io.h>
#include <linux/processor.h>
#include <asm/sn/ioc3.h>
#include <asm/setup.h>
static inline struct ioc3_uartregs *console_uart(void)
{
struct ioc3 *ioc3;
ioc3 = (struct ioc3 *)((void *)(0x900000001f600000));
return &ioc3->sregs.uarta;
}
void prom_putchar(char c)
{
struct ioc3_uartregs *uart = console_uart();
while ((readb(&uart->iu_lsr) & 0x20) == 0)
cpu_relax();
writeb(c, &uart->iu_thr);
}
Annotation
- Immediate include surface: `linux/io.h`, `linux/processor.h`, `asm/sn/ioc3.h`, `asm/setup.h`.
- Detected declarations: `function prom_putchar`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.