arch/mips/sgi-ip32/ip32-irq.c

Source file repositories/reference/linux-study-clean/arch/mips/sgi-ip32/ip32-irq.c

File Facts

System
Linux kernel
Corpus path
arch/mips/sgi-ip32/ip32-irq.c
Extension
.c
Size
12825 bytes
Lines
498
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

switch (irq) {
		case MACE_VID_IN1_IRQ ... MACE_PCI_BRIDGE_IRQ:
			irq_set_chip_and_handler_name(irq,
						      &ip32_mace_interrupt,
						      handle_level_irq,
						      "level");
			break;

		case MACEPCI_SCSI0_IRQ ...  MACEPCI_SHARED2_IRQ:
			irq_set_chip_and_handler_name(irq,
						      &ip32_macepci_interrupt,
						      handle_level_irq,
						      "level");
			break;

		case CRIME_CPUERR_IRQ:
		case CRIME_MEMERR_IRQ:
			irq_set_chip_and_handler_name(irq,
						      &crime_level_interrupt,
						      handle_level_irq,
						      "level");
			break;

		case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ:
		case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ:
		case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ:
		case CRIME_VICE_IRQ:
			irq_set_chip_and_handler_name(irq,
						      &crime_edge_interrupt,
						      handle_edge_irq,
						      "edge");
			break;

		case MACEISA_PARALLEL_IRQ:
		case MACEISA_SERIAL1_TDMAPR_IRQ:
		case MACEISA_SERIAL2_TDMAPR_IRQ:
			irq_set_chip_and_handler_name(irq,
						      &ip32_maceisa_edge_interrupt,
						      handle_edge_irq,
						      "edge");
			break;

		default:
			irq_set_chip_and_handler_name(irq,
						      &ip32_maceisa_level_interrupt,
						      handle_level_irq,
						      "level");
			break;
		}
	}
	if (request_irq(CRIME_MEMERR_IRQ, crime_memerr_intr, 0,
			"CRIME memory error", NULL))
		pr_err("Failed to register CRIME memory error interrupt\n");
	if (request_irq(CRIME_CPUERR_IRQ, crime_cpuerr_intr, 0,
			"CRIME CPU error", NULL))
		pr_err("Failed to register CRIME CPU error interrupt\n");

#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
	change_c0_status(ST0_IM, ALLINTS);
}

Annotation

Implementation Notes