arch/mips/txx9/generic/mem_tx4927.c
Source file repositories/reference/linux-study-clean/arch/mips/txx9/generic/mem_tx4927.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/txx9/generic/mem_tx4927.c- Extension
.c- Size
- 2358 bytes
- Lines
- 76
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/init.hlinux/types.hlinux/io.hasm/txx9/tx4927.h
Detected Declarations
function tx4927_process_sdccrfunction tx4927_get_mem_size
Annotated Snippet
#include <linux/init.h>
#include <linux/types.h>
#include <linux/io.h>
#include <asm/txx9/tx4927.h>
static unsigned int __init tx4927_process_sdccr(u64 __iomem *addr)
{
u64 val;
unsigned int sdccr_ce;
unsigned int sdccr_bs;
unsigned int sdccr_rs;
unsigned int sdccr_cs;
unsigned int sdccr_mw;
unsigned int bs = 0;
unsigned int rs = 0;
unsigned int cs = 0;
unsigned int mw = 0;
val = __raw_readq(addr);
/* MVMCP -- need #defs for these bits masks */
sdccr_ce = ((val & (1 << 10)) >> 10);
sdccr_bs = ((val & (1 << 8)) >> 8);
sdccr_rs = ((val & (3 << 5)) >> 5);
sdccr_cs = ((val & (7 << 2)) >> 2);
sdccr_mw = ((val & (1 << 0)) >> 0);
if (sdccr_ce) {
bs = 2 << sdccr_bs;
rs = 2048 << sdccr_rs;
cs = 256 << sdccr_cs;
mw = 8 >> sdccr_mw;
}
return rs * cs * mw * bs;
}
unsigned int __init tx4927_get_mem_size(void)
{
unsigned int total = 0;
int i;
for (i = 0; i < ARRAY_SIZE(tx4927_sdramcptr->cr); i++)
total += tx4927_process_sdccr(&tx4927_sdramcptr->cr[i]);
return total;
}
Annotation
- Immediate include surface: `linux/init.h`, `linux/types.h`, `linux/io.h`, `asm/txx9/tx4927.h`.
- Detected declarations: `function tx4927_process_sdccr`, `function tx4927_get_mem_size`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.