arch/nios2/boot/dts/10m50_devboard.dts
Source file repositories/reference/linux-study-clean/arch/nios2/boot/dts/10m50_devboard.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/nios2/boot/dts/10m50_devboard.dts- Extension
.dts- Size
- 5328 bytes
- Lines
- 238
- Domain
- Architecture Layer
- Bucket
- arch/nios2
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2015 Altera Corporation. All rights reserved.
*/
/dts-v1/;
/ {
model = "Altera NiosII Max10";
compatible = "altr,niosii-max10";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu: cpu@0 {
device_type = "cpu";
compatible = "altr,nios2-1.1";
reg = <0x00000000>;
interrupt-controller;
#interrupt-cells = <1>;
altr,exception-addr = <0xc8000120>;
altr,fast-tlb-miss-addr = <0xc0000100>;
altr,has-div = <1>;
altr,has-initda = <1>;
altr,has-mmu = <1>;
altr,has-mul = <1>;
altr,implementation = "fast";
altr,pid-num-bits = <8>;
altr,reset-addr = <0xd4000000>;
altr,tlb-num-entries = <256>;
altr,tlb-num-ways = <16>;
altr,tlb-ptr-sz = <8>;
clock-frequency = <75000000>;
dcache-line-size = <32>;
dcache-size = <32768>;
icache-line-size = <32>;
icache-size = <32768>;
};
};
memory {
device_type = "memory";
reg = <0x08000000 0x08000000>,
<0x00000000 0x00000400>;
};
sopc0: sopc@0 {
device_type = "soc";
ranges;
#address-cells = <1>;
#size-cells = <1>;
compatible = "altr,avalon", "simple-bus";
bus-frequency = <75000000>;
jtag_uart: serial@18001530 {
compatible = "altr,juart-1.0";
reg = <0x18001530 0x00000008>;
interrupt-parent = <&cpu>;
interrupts = <7>;
};
a_16550_uart_0: serial@18001600 {
compatible = "altr,16550-FIFO32", "ns16550a";
reg = <0x18001600 0x00000200>;
interrupt-parent = <&cpu>;
interrupts = <1>;
auto-flow-control = <1>;
Annotation
- Atlas domain: Architecture Layer / arch/nios2.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.