arch/nios2/include/asm/asm-macros.h
Source file repositories/reference/linux-study-clean/arch/nios2/include/asm/asm-macros.h
File Facts
- System
- Linux kernel
- Corpus path
arch/nios2/include/asm/asm-macros.h- Extension
.h- Size
- 6375 bytes
- Lines
- 299
- Domain
- Architecture Layer
- Bucket
- arch/nios2
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _ASM_NIOS2_ASMMACROS_H
#define _ASM_NIOS2_ASMMACROS_H
/*
* ANDs reg2 with mask and places the result in reg1.
*
* You cannnot use the same register for reg1 & reg2.
*/
.macro ANDI32 reg1, reg2, mask
.if \mask & 0xffff
.if \mask & 0xffff0000
movhi \reg1, %hi(\mask)
movui \reg1, %lo(\mask)
and \reg1, \reg1, \reg2
.else
andi \reg1, \reg2, %lo(\mask)
.endif
.else
andhi \reg1, \reg2, %hi(\mask)
.endif
.endm
/*
* ORs reg2 with mask and places the result in reg1.
*
* It is safe to use the same register for reg1 & reg2.
*/
.macro ORI32 reg1, reg2, mask
.if \mask & 0xffff
.if \mask & 0xffff0000
orhi \reg1, \reg2, %hi(\mask)
ori \reg1, \reg2, %lo(\mask)
.else
ori \reg1, \reg2, %lo(\mask)
.endif
.else
orhi \reg1, \reg2, %hi(\mask)
.endif
.endm
/*
* XORs reg2 with mask and places the result in reg1.
*
* It is safe to use the same register for reg1 & reg2.
*/
.macro XORI32 reg1, reg2, mask
.if \mask & 0xffff
.if \mask & 0xffff0000
xorhi \reg1, \reg2, %hi(\mask)
xori \reg1, \reg1, %lo(\mask)
.else
xori \reg1, \reg2, %lo(\mask)
.endif
.else
xorhi \reg1, \reg2, %hi(\mask)
.endif
.endm
/*
* This is a support macro for BTBZ & BTBNZ. It checks
* the bit to make sure it is valid 32 value.
*
* It is safe to use the same register for reg1 & reg2.
*/
.macro BT reg1, reg2, bit
.if \bit > 31
.err
.else
.if \bit < 16
andi \reg1, \reg2, (1 << \bit)
.else
andhi \reg1, \reg2, (1 << (\bit - 16))
.endif
.endif
.endm
/*
* Tests the bit in reg2 and branches to label if the
* bit is zero. The result of the bit test is stored in reg1.
*
* It is safe to use the same register for reg1 & reg2.
*/
.macro BTBZ reg1, reg2, bit, label
BT \reg1, \reg2, \bit
beq \reg1, r0, \label
.endm
Annotation
- Atlas domain: Architecture Layer / arch/nios2.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.