arch/nios2/include/asm/registers.h
Source file repositories/reference/linux-study-clean/arch/nios2/include/asm/registers.h
File Facts
- System
- Linux kernel
- Corpus path
arch/nios2/include/asm/registers.h- Extension
.h- Size
- 1598 bytes
- Lines
- 59
- Domain
- Architecture Layer
- Bucket
- arch/nios2
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/cpuinfo.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _ASM_NIOS2_REGISTERS_H
#define _ASM_NIOS2_REGISTERS_H
#ifndef __ASSEMBLER__
#include <asm/cpuinfo.h>
#endif
/* control register numbers */
#define CTL_FSTATUS 0
#define CTL_ESTATUS 1
#define CTL_BSTATUS 2
#define CTL_IENABLE 3
#define CTL_IPENDING 4
#define CTL_CPUID 5
#define CTL_RSV1 6
#define CTL_EXCEPTION 7
#define CTL_PTEADDR 8
#define CTL_TLBACC 9
#define CTL_TLBMISC 10
#define CTL_RSV2 11
#define CTL_BADADDR 12
#define CTL_CONFIG 13
#define CTL_MPUBASE 14
#define CTL_MPUACC 15
/* access control registers using GCC builtins */
#define RDCTL(r) __builtin_rdctl(r)
#define WRCTL(r, v) __builtin_wrctl(r, v)
/* status register bits */
#define STATUS_PIE (1 << 0) /* processor interrupt enable */
#define STATUS_U (1 << 1) /* user mode */
#define STATUS_EH (1 << 2) /* Exception mode */
/* estatus register bits */
#define ESTATUS_EPIE (1 << 0) /* processor interrupt enable */
#define ESTATUS_EU (1 << 1) /* user mode */
#define ESTATUS_EH (1 << 2) /* Exception mode */
/* tlbmisc register bits */
#define TLBMISC_PID_SHIFT 4
#ifndef __ASSEMBLER__
#define TLBMISC_PID_MASK ((1UL << cpuinfo.tlb_pid_num_bits) - 1)
#endif
#define TLBMISC_WAY_MASK 0xf
#define TLBMISC_WAY_SHIFT 20
#define TLBMISC_PID (TLBMISC_PID_MASK << TLBMISC_PID_SHIFT) /* TLB PID */
#define TLBMISC_WE (1 << 18) /* TLB write enable */
#define TLBMISC_RD (1 << 19) /* TLB read */
#define TLBMISC_WAY (TLBMISC_WAY_MASK << TLBMISC_WAY_SHIFT) /* TLB way */
#endif /* _ASM_NIOS2_REGISTERS_H */
Annotation
- Immediate include surface: `asm/cpuinfo.h`.
- Atlas domain: Architecture Layer / arch/nios2.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.