arch/nios2/kernel/insnemu.S

Source file repositories/reference/linux-study-clean/arch/nios2/kernel/insnemu.S

File Facts

System
Linux kernel
Corpus path
arch/nios2/kernel/insnemu.S
Extension
.S
Size
14754 bytes
Lines
581
Domain
Architecture Layer
Bucket
arch/nios2
Inferred role
Architecture Layer: arch/nios2
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <linux/linkage.h>
#include <asm/entry.h>

.set noat
.set nobreak

/*
* Explicitly allow the use of r1 (the assembler temporary register)
* within this code. This register is normally reserved for the use of
* the compiler.
*/

ENTRY(instruction_trap)
	ldw	r1, PT_R1(sp)		// Restore registers
	ldw	r2, PT_R2(sp)
	ldw	r3, PT_R3(sp)
	ldw	r4, PT_R4(sp)
	ldw	r5, PT_R5(sp)
	ldw	r6, PT_R6(sp)
	ldw	r7, PT_R7(sp)
	ldw	r8, PT_R8(sp)
	ldw	r9, PT_R9(sp)
	ldw	r10, PT_R10(sp)
	ldw	r11, PT_R11(sp)
	ldw	r12, PT_R12(sp)
	ldw	r13, PT_R13(sp)
	ldw	r14, PT_R14(sp)
	ldw	r15, PT_R15(sp)
	ldw	ra, PT_RA(sp)
	ldw	fp, PT_FP(sp)
	ldw	gp, PT_GP(sp)
	ldw	et, PT_ESTATUS(sp)
	wrctl	estatus, et
	ldw	ea, PT_EA(sp)
	ldw	et, PT_SP(sp)		/* backup sp in et */

	addi	sp, sp, PT_REGS_SIZE

	/* INSTRUCTION EMULATION
	*  ---------------------
	*
	* Nios II processors generate exceptions for unimplemented instructions.
	* The routines below emulate these instructions.  Depending on the
	* processor core, the only instructions that might need to be emulated
	* are div, divu, mul, muli, mulxss, mulxsu, and mulxuu.
	*
	* The emulations match the instructions, except for the following
	* limitations:
	*
	* 1) The emulation routines do not emulate the use of the exception
	*    temporary register (et) as a source operand because the exception
	*    handler already has modified it.
	*
	* 2) The routines do not emulate the use of the stack pointer (sp) or
	*    the exception return address register (ea) as a destination because
	*    modifying these registers crashes the exception handler or the
	*    interrupted routine.
	*
	* Detailed Design
	* ---------------
	*
	* The emulation routines expect the contents of integer registers r0-r31
	* to be on the stack at addresses sp, 4(sp), 8(sp), ... 124(sp).  The
	* routines retrieve source operands from the stack and modify the
	* destination register's value on the stack prior to the end of the
	* exception handler.  Then all registers except the destination register
	* are restored to their previous values.
	*
	* The instruction that causes the exception is found at address -4(ea).
	* The instruction's OP and OPX fields identify the operation to be

Annotation

Implementation Notes