arch/openrisc/include/asm/bitops/atomic.h

File Facts

System

Linux kernel

Corpus path

arch/openrisc/include/asm/bitops/atomic.h

Extension

.h

Size

2858 bytes

Lines

124

Domain

Architecture Layer

Bucket

arch/openrisc

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• function Copyright
• function clear_bit
• function change_bit
• function test_and_set_bit
• function test_and_clear_bit
• function test_and_change_bit

Annotated Snippet

#ifndef __ASM_OPENRISC_BITOPS_ATOMIC_H
#define __ASM_OPENRISC_BITOPS_ATOMIC_H

static inline void set_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long tmp;

	__asm__ __volatile__(
		"1:	l.lwa	%0,0(%1)	\n"
		"	l.or	%0,%0,%2	\n"
		"	l.swa	0(%1),%0	\n"
		"	l.bnf	1b		\n"
		"	 l.nop			\n"
		: "=&r"(tmp)
		: "r"(p), "r"(mask)
		: "cc", "memory");
}

static inline void clear_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long tmp;

	__asm__ __volatile__(
		"1:	l.lwa	%0,0(%1)	\n"
		"	l.and	%0,%0,%2	\n"
		"	l.swa	0(%1),%0	\n"
		"	l.bnf	1b		\n"
		"	 l.nop			\n"
		: "=&r"(tmp)
		: "r"(p), "r"(~mask)
		: "cc", "memory");
}

static inline void change_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long tmp;

	__asm__ __volatile__(
		"1:	l.lwa	%0,0(%1)	\n"
		"	l.xor	%0,%0,%2	\n"
		"	l.swa	0(%1),%0	\n"
		"	l.bnf	1b		\n"
		"	 l.nop			\n"
		: "=&r"(tmp)
		: "r"(p), "r"(mask)
		: "cc", "memory");
}

static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long old;
	unsigned long tmp;

	__asm__ __volatile__(
		"1:	l.lwa	%0,0(%2)	\n"
		"	l.or	%1,%0,%3	\n"
		"	l.swa	0(%2),%1	\n"
		"	l.bnf	1b		\n"
		"	 l.nop			\n"
		: "=&r"(old), "=&r"(tmp)
		: "r"(p), "r"(mask)
		: "cc", "memory");

	return (old & mask) != 0;
}

static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long old;
	unsigned long tmp;

	__asm__ __volatile__(
		"1:	l.lwa	%0,0(%2)	\n"
		"	l.and	%1,%0,%3	\n"
		"	l.swa	0(%2),%1	\n"
		"	l.bnf	1b		\n"
		"	 l.nop			\n"
		: "=&r"(old), "=&r"(tmp)
		: "r"(p), "r"(~mask)
		: "cc", "memory");

Annotation

• Detected declarations: `function Copyright`, `function clear_bit`, `function change_bit`, `function test_and_set_bit`, `function test_and_clear_bit`, `function test_and_change_bit`.
• Atlas domain: Architecture Layer / arch/openrisc.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.