arch/openrisc/include/asm/cpuinfo.h
Source file repositories/reference/linux-study-clean/arch/openrisc/include/asm/cpuinfo.h
File Facts
- System
- Linux kernel
- Corpus path
arch/openrisc/include/asm/cpuinfo.h- Extension
.h- Size
- 931 bytes
- Lines
- 46
- Domain
- Architecture Layer
- Bucket
- arch/openrisc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/spr.hasm/spr_defs.h
Detected Declarations
struct cache_descstruct cpuinfo_or1k
Annotated Snippet
struct cache_desc {
u32 size;
u32 sets;
u32 block_size;
u32 ways;
};
struct cpuinfo_or1k {
u32 clock_frequency;
struct cache_desc icache;
struct cache_desc dcache;
u16 coreid;
};
extern struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS];
extern void setup_cpuinfo(void);
/*
* Check if the cache component exists.
*/
extern bool cpu_cache_is_present(const unsigned int cache_type);
#endif /* __ASM_OPENRISC_CPUINFO_H */
Annotation
- Immediate include surface: `asm/spr.h`, `asm/spr_defs.h`.
- Detected declarations: `struct cache_desc`, `struct cpuinfo_or1k`.
- Atlas domain: Architecture Layer / arch/openrisc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.