arch/openrisc/include/asm/fpu.h
Source file repositories/reference/linux-study-clean/arch/openrisc/include/asm/fpu.h
File Facts
- System
- Linux kernel
- Corpus path
arch/openrisc/include/asm/fpu.h- Extension
.h- Size
- 468 bytes
- Lines
- 23
- Domain
- Architecture Layer
- Bucket
- arch/openrisc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct task_structfunction save_fpufunction restore_fpu
Annotated Snippet
#ifndef __ASM_OPENRISC_FPU_H
#define __ASM_OPENRISC_FPU_H
struct task_struct;
#ifdef CONFIG_FPU
static inline void save_fpu(struct task_struct *task)
{
task->thread.fpcsr = mfspr(SPR_FPCSR);
}
static inline void restore_fpu(struct task_struct *task)
{
mtspr(SPR_FPCSR, task->thread.fpcsr);
}
#else
#define save_fpu(tsk) do { } while (0)
#define restore_fpu(tsk) do { } while (0)
#endif
#endif /* __ASM_OPENRISC_FPU_H */
Annotation
- Detected declarations: `struct task_struct`, `function save_fpu`, `function restore_fpu`.
- Atlas domain: Architecture Layer / arch/openrisc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.