arch/openrisc/include/asm/spr_defs.h

Source file repositories/reference/linux-study-clean/arch/openrisc/include/asm/spr_defs.h

File Facts

System
Linux kernel
Corpus path
arch/openrisc/include/asm/spr_defs.h
Extension
.h
Size
23252 bytes
Lines
615
Domain
Architecture Layer
Bucket
arch/openrisc
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef SPR_DEFS__H
#define SPR_DEFS__H

/* Definition of special-purpose registers (SPRs). */

#define MAX_GRPS (32)
#define MAX_SPRS_PER_GRP_BITS (11)
#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS)
#define MAX_SPRS (0x10000)

/* Base addresses for the groups */
#define SPRGROUP_SYS	(0 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_DMMU	(1 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_IMMU	(2 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_DC	(3 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_IC	(4 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_MAC	(5 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_D	(6 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_PC	(7 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_PM	(8 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_PIC	(9 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_TT	(10 << MAX_SPRS_PER_GRP_BITS)
#define SPRGROUP_FP	(11 << MAX_SPRS_PER_GRP_BITS)

/* System control and status group */
#define SPR_VR		(SPRGROUP_SYS + 0)
#define SPR_UPR		(SPRGROUP_SYS + 1)
#define SPR_CPUCFGR	(SPRGROUP_SYS + 2)
#define SPR_DMMUCFGR	(SPRGROUP_SYS + 3)
#define SPR_IMMUCFGR	(SPRGROUP_SYS + 4)
#define SPR_DCCFGR	(SPRGROUP_SYS + 5)
#define SPR_ICCFGR	(SPRGROUP_SYS + 6)
#define SPR_DCFGR	(SPRGROUP_SYS + 7)
#define SPR_PCCFGR	(SPRGROUP_SYS + 8)
#define SPR_VR2		(SPRGROUP_SYS + 9)
#define SPR_AVR		(SPRGROUP_SYS + 10)
#define SPR_EVBAR	(SPRGROUP_SYS + 11)
#define SPR_AECR	(SPRGROUP_SYS + 12)
#define SPR_AESR	(SPRGROUP_SYS + 13)
#define SPR_NPC         (SPRGROUP_SYS + 16)  /* CZ 21/06/01 */
#define SPR_SR		(SPRGROUP_SYS + 17)  /* CZ 21/06/01 */
#define SPR_PPC         (SPRGROUP_SYS + 18)  /* CZ 21/06/01 */
#define SPR_FPCSR       (SPRGROUP_SYS + 20)  /* CZ 21/06/01 */
#define SPR_EPCR_BASE	(SPRGROUP_SYS + 32)  /* CZ 21/06/01 */
#define SPR_EPCR_LAST	(SPRGROUP_SYS + 47)  /* CZ 21/06/01 */
#define SPR_EEAR_BASE	(SPRGROUP_SYS + 48)
#define SPR_EEAR_LAST	(SPRGROUP_SYS + 63)
#define SPR_ESR_BASE	(SPRGROUP_SYS + 64)
#define SPR_ESR_LAST	(SPRGROUP_SYS + 79)
#define SPR_COREID	(SPRGROUP_SYS + 128)
#define SPR_NUMCORES	(SPRGROUP_SYS + 129)
#define SPR_GPR_BASE	(SPRGROUP_SYS + 1024)

/* Data MMU group */
#define SPR_DMMUCR	(SPRGROUP_DMMU + 0)
#define SPR_DTLBEIR	(SPRGROUP_DMMU + 2)
#define SPR_DTLBMR_BASE(WAY)	(SPRGROUP_DMMU + 0x200 + (WAY) * 0x100)
#define SPR_DTLBMR_LAST(WAY)	(SPRGROUP_DMMU + 0x27f + (WAY) * 0x100)
#define SPR_DTLBTR_BASE(WAY)	(SPRGROUP_DMMU + 0x280 + (WAY) * 0x100)
#define SPR_DTLBTR_LAST(WAY)	(SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100)

/* Instruction MMU group */
#define SPR_IMMUCR	(SPRGROUP_IMMU + 0)
#define SPR_ITLBEIR	(SPRGROUP_IMMU + 2)
#define SPR_ITLBMR_BASE(WAY)	(SPRGROUP_IMMU + 0x200 + (WAY) * 0x100)
#define SPR_ITLBMR_LAST(WAY)	(SPRGROUP_IMMU + 0x27f + (WAY) * 0x100)
#define SPR_ITLBTR_BASE(WAY)	(SPRGROUP_IMMU + 0x280 + (WAY) * 0x100)
#define SPR_ITLBTR_LAST(WAY)	(SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100)

/* Data cache group */
#define SPR_DCCR	(SPRGROUP_DC + 0)
#define SPR_DCBPR	(SPRGROUP_DC + 1)
#define SPR_DCBFR	(SPRGROUP_DC + 2)
#define SPR_DCBIR	(SPRGROUP_DC + 3)
#define SPR_DCBWR	(SPRGROUP_DC + 4)
#define SPR_DCBLR	(SPRGROUP_DC + 5)
#define SPR_DCR_BASE(WAY)	(SPRGROUP_DC + 0x200 + (WAY) * 0x200)
#define SPR_DCR_LAST(WAY)	(SPRGROUP_DC + 0x3ff + (WAY) * 0x200)

/* Instruction cache group */
#define SPR_ICCR	(SPRGROUP_IC + 0)
#define SPR_ICBPR	(SPRGROUP_IC + 1)
#define SPR_ICBIR	(SPRGROUP_IC + 2)
#define SPR_ICBLR	(SPRGROUP_IC + 3)
#define SPR_ICR_BASE(WAY)	(SPRGROUP_IC + 0x200 + (WAY) * 0x200)
#define SPR_ICR_LAST(WAY)	(SPRGROUP_IC + 0x3ff + (WAY) * 0x200)

/* MAC group */
#define SPR_MACLO	(SPRGROUP_MAC + 1)
#define SPR_MACHI	(SPRGROUP_MAC + 2)

Annotation

Implementation Notes