arch/openrisc/mm/cache.c
Source file repositories/reference/linux-study-clean/arch/openrisc/mm/cache.c
File Facts
- System
- Linux kernel
- Corpus path
arch/openrisc/mm/cache.c- Extension
.c- Size
- 2972 bytes
- Lines
- 116
- Domain
- Architecture Layer
- Bucket
- arch/openrisc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/spr.hasm/spr_defs.hasm/cache.hasm/cacheflush.hasm/cpuinfo.hasm/tlbflush.h
Detected Declarations
function Copyrightfunction cache_loopfunction cache_loop_pagefunction local_dcache_page_flushfunction local_icache_page_invfunction local_icache_all_invfunction local_dcache_range_flushfunction local_dcache_range_invfunction local_icache_range_invfunction update_cacheexport local_dcache_page_flushexport local_icache_page_inv
Annotated Snippet
while (paddr < end) {
mtspr(SPR_ICBIR, paddr);
paddr += block_size;
}
}
}
void local_dcache_range_flush(unsigned long start, unsigned long end)
{
cache_loop(start, end, SPR_DCBFR, SPR_UPR_DCP);
}
void local_dcache_range_inv(unsigned long start, unsigned long end)
{
cache_loop(start, end, SPR_DCBIR, SPR_UPR_DCP);
}
void local_icache_range_inv(unsigned long start, unsigned long end)
{
cache_loop(start, end, SPR_ICBIR, SPR_UPR_ICP);
}
void update_cache(struct vm_area_struct *vma, unsigned long address,
pte_t *pte)
{
unsigned long pfn = pte_val(*pte) >> PAGE_SHIFT;
struct folio *folio = page_folio(pfn_to_page(pfn));
int dirty = !test_and_set_bit(PG_dc_clean, &folio->flags.f);
/*
* Since icaches do not snoop for updated data on OpenRISC, we
* must write back and invalidate any dirty pages manually. We
* can skip data pages, since they will not end up in icaches.
*/
if ((vma->vm_flags & VM_EXEC) && dirty) {
unsigned int nr = folio_nr_pages(folio);
while (nr--)
sync_icache_dcache(folio_page(folio, nr));
}
}
Annotation
- Immediate include surface: `asm/spr.h`, `asm/spr_defs.h`, `asm/cache.h`, `asm/cacheflush.h`, `asm/cpuinfo.h`, `asm/tlbflush.h`.
- Detected declarations: `function Copyright`, `function cache_loop`, `function cache_loop_page`, `function local_dcache_page_flush`, `function local_icache_page_inv`, `function local_icache_all_inv`, `function local_dcache_range_flush`, `function local_dcache_range_inv`, `function local_icache_range_inv`, `function update_cache`.
- Atlas domain: Architecture Layer / arch/openrisc.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.