arch/parisc/kernel/perf.c
Source file repositories/reference/linux-study-clean/arch/parisc/kernel/perf.c
File Facts
- System
- Linux kernel
- Corpus path
arch/parisc/kernel/perf.c- Extension
.c- Size
- 22435 bytes
- Lines
- 838
- Domain
- Architecture Layer
- Bucket
- arch/parisc
- Inferred role
- Architecture Layer: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/capability.hlinux/init.hlinux/proc_fs.hlinux/miscdevice.hlinux/spinlock.hlinux/uaccess.hasm/perf.hasm/parisc-device.hasm/processor.hasm/runway.hasm/io.hperf_images.h
Detected Declarations
struct rdr_tbl_entfunction perf_configfunction perf_openfunction perf_releasefunction perf_readfunction perf_writefunction perf_patch_imagesfunction perf_ioctlfunction perf_initfunction perf_start_countersfunction perf_stop_countersfunction perf_rdr_get_entryfunction perf_rdr_read_ubuffunction perf_rdr_clearfunction perf_write_imagefunction perf_rdr_writemodule init perf_init
Annotated Snippet
static const struct file_operations perf_fops = {
.read = perf_read,
.write = perf_write,
.unlocked_ioctl = perf_ioctl,
.compat_ioctl = perf_ioctl,
.open = perf_open,
.release = perf_release
};
static struct miscdevice perf_dev = {
.minor = MISC_DYNAMIC_MINOR,
.name = PA_PERF_DEV,
.fops = &perf_fops,
};
/*
* Initialize the module
*/
static int __init perf_init(void)
{
int ret;
/* Determine correct processor interface to use */
bitmask_array = perf_bitmasks;
if (boot_cpu_data.cpu_type == pcxu ||
boot_cpu_data.cpu_type == pcxu_) {
perf_processor_interface = ONYX_INTF;
} else if (boot_cpu_data.cpu_type == pcxw ||
boot_cpu_data.cpu_type == pcxw_ ||
boot_cpu_data.cpu_type == pcxw2 ||
boot_cpu_data.cpu_type == mako ||
boot_cpu_data.cpu_type == mako2) {
perf_processor_interface = CUDA_INTF;
if (boot_cpu_data.cpu_type == pcxw2 ||
boot_cpu_data.cpu_type == mako ||
boot_cpu_data.cpu_type == mako2)
bitmask_array = perf_bitmasks_piranha;
} else {
perf_processor_interface = UNKNOWN_INTF;
printk("Performance monitoring counters not supported on this processor\n");
return -ENODEV;
}
ret = misc_register(&perf_dev);
if (ret) {
printk(KERN_ERR "Performance monitoring counters: "
"cannot register misc device.\n");
return ret;
}
/* Patch the images to match the system */
perf_patch_images();
/* TODO: this only lets us access the first cpu.. what to do for SMP? */
cpu_device = per_cpu(cpu_data, 0).dev;
printk("Performance monitoring counters enabled for %s\n",
per_cpu(cpu_data, 0).dev->name);
return 0;
}
device_initcall(perf_init);
/*
* perf_start_counters(void)
*
* Start the counters.
*/
static void perf_start_counters(void)
{
/* Enable performance monitor counters */
perf_intrigue_enable_perf_counters();
}
/*
* perf_stop_counters
*
* Stop the performance counters and save counts
* in a per_processor array.
*/
static int perf_stop_counters(uint32_t *raddr)
{
uint64_t userbuf[MAX_RDR_WORDS];
/* Disable performance counters */
perf_intrigue_disable_perf_counters();
if (perf_processor_interface == ONYX_INTF) {
uint64_t tmp64;
/*
Annotation
- Immediate include surface: `linux/capability.h`, `linux/init.h`, `linux/proc_fs.h`, `linux/miscdevice.h`, `linux/spinlock.h`, `linux/uaccess.h`, `asm/perf.h`, `asm/parisc-device.h`.
- Detected declarations: `struct rdr_tbl_ent`, `function perf_config`, `function perf_open`, `function perf_release`, `function perf_read`, `function perf_write`, `function perf_patch_images`, `function perf_ioctl`, `function perf_init`, `function perf_start_counters`.
- Atlas domain: Architecture Layer / arch/parisc.
- Implementation status: pattern implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.