arch/parisc/mm/hugetlbpage.c
Source file repositories/reference/linux-study-clean/arch/parisc/mm/hugetlbpage.c
File Facts
- System
- Linux kernel
- Corpus path
arch/parisc/mm/hugetlbpage.c- Extension
.c- Size
- 3558 bytes
- Lines
- 162
- Domain
- Architecture Layer
- Bucket
- arch/parisc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/fs.hlinux/mm.hlinux/sched/mm.hlinux/hugetlb.hlinux/pagemap.hlinux/sysctl.hasm/mman.hasm/tlb.hasm/tlbflush.hasm/cacheflush.hasm/mmu_context.h
Detected Declarations
function Copyrightfunction purge_tlb_entries_hugefunction __set_huge_pte_atfunction set_huge_pte_atfunction huge_ptep_get_and_clearfunction huge_ptep_set_wrprotectfunction huge_ptep_set_access_flags
Annotated Snippet
if (!p4d_none(*p4d)) {
pud = pud_offset(p4d, addr);
if (!pud_none(*pud)) {
pmd = pmd_offset(pud, addr);
if (!pmd_none(*pmd))
pte = pte_offset_huge(pmd, addr);
}
}
}
return pte;
}
/* Purge data and instruction TLB entries. Must be called holding
* the pa_tlb_lock. The TLB purge instructions are slow on SMP
* machines since the purge must be broadcast to all CPUs.
*/
static inline void purge_tlb_entries_huge(struct mm_struct *mm, unsigned long addr)
{
int i;
/* We may use multiple physical huge pages (e.g. 2x1 MB) to emulate
* Linux standard huge pages (e.g. 2 MB) */
BUILD_BUG_ON(REAL_HPAGE_SHIFT > HPAGE_SHIFT);
addr &= HPAGE_MASK;
addr |= _HUGE_PAGE_SIZE_ENCODING_DEFAULT;
for (i = 0; i < (1 << (HPAGE_SHIFT-REAL_HPAGE_SHIFT)); i++) {
purge_tlb_entries(mm, addr);
addr += (1UL << REAL_HPAGE_SHIFT);
}
}
/* __set_huge_pte_at() must be called holding the pa_tlb_lock. */
static void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
pte_t *ptep, pte_t entry)
{
unsigned long addr_start;
int i;
addr &= HPAGE_MASK;
addr_start = addr;
for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
set_pte(ptep, entry);
ptep++;
addr += PAGE_SIZE;
pte_val(entry) += PAGE_SIZE;
}
purge_tlb_entries_huge(mm, addr_start);
}
void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
pte_t *ptep, pte_t entry, unsigned long sz)
{
__set_huge_pte_at(mm, addr, ptep, entry);
}
pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
pte_t *ptep, unsigned long sz)
{
pte_t entry;
entry = *ptep;
__set_huge_pte_at(mm, addr, ptep, __pte(0));
return entry;
}
void huge_ptep_set_wrprotect(struct mm_struct *mm,
unsigned long addr, pte_t *ptep)
{
pte_t old_pte;
old_pte = *ptep;
__set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
}
int huge_ptep_set_access_flags(struct vm_area_struct *vma,
unsigned long addr, pte_t *ptep,
pte_t pte, int dirty)
{
int changed;
struct mm_struct *mm = vma->vm_mm;
changed = !pte_same(*ptep, pte);
Annotation
- Immediate include surface: `linux/fs.h`, `linux/mm.h`, `linux/sched/mm.h`, `linux/hugetlb.h`, `linux/pagemap.h`, `linux/sysctl.h`, `asm/mman.h`, `asm/tlb.h`.
- Detected declarations: `function Copyright`, `function purge_tlb_entries_huge`, `function __set_huge_pte_at`, `function set_huge_pte_at`, `function huge_ptep_get_and_clear`, `function huge_ptep_set_wrprotect`, `function huge_ptep_set_access_flags`.
- Atlas domain: Architecture Layer / arch/parisc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.