arch/powerpc/boot/dts/fsl/ge_imp3a.dts
Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/fsl/ge_imp3a.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/boot/dts/fsl/ge_imp3a.dts- Extension
.dts- Size
- 4927 bytes
- Lines
- 252
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* GE IMP3A Device Tree Source
*
* Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
*
* Based on: P2020 DS Device Tree Source
* Copyright 2009 Freescale Semiconductor Inc.
*/
/include/ "p2020si-pre.dtsi"
/ {
model = "GE_IMP3A";
compatible = "ge,imp3a";
memory {
device_type = "memory";
};
lbc: localbus@fef05000 {
reg = <0 0xfef05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xff000000 0x01000000
0x1 0x0 0x0 0xe0000000 0x08000000
0x2 0x0 0x0 0xe8000000 0x08000000
0x3 0x0 0x0 0xfc100000 0x00020000
0x4 0x0 0x0 0xfc000000 0x00008000
0x5 0x0 0x0 0xfc008000 0x00008000
0x6 0x0 0x0 0xfee00000 0x00040000
0x7 0x0 0x0 0xfee80000 0x00040000>;
/* nor@0,0 is a mirror of part of the memory in nor@1,0
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
reg = <0x0 0x0 0x1000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
label = "firmware";
reg = <0x0 0x1000000>;
read-only;
};
};
*/
nor@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ge,imp3a-paged-flash", "cfi-flash";
reg = <0x1 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
label = "user";
reg = <0x0 0x7800000>;
};
partition@7800000 {
label = "firmware";
reg = <0x7800000 0x800000>;
read-only;
};
};
nvram@3,0 {
Annotation
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.