arch/powerpc/boot/dts/fsl/mpc8544ds.dts

Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/fsl/mpc8544ds.dts

File Facts

System
Linux kernel
Corpus path
arch/powerpc/boot/dts/fsl/mpc8544ds.dts
Extension
.dts
Size
2476 bytes
Lines
104
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * MPC8544 DS Device Tree Source
 *
 * Copyright 2007, 2008 Freescale Semiconductor Inc.
 */

/include/ "mpc8544si-pre.dtsi"

/ {
	model = "MPC8544DS";
	compatible = "MPC8544DS", "MPC85xxDS";

	memory {
		device_type = "memory";
		reg = <0 0 0 0>;	// Filled by U-Boot
	};

	board_lbc: lbc: localbus@e0005000 {
		reg = <0 0xe0005000 0 0x1000>;

		ranges = <0x0 0x0 0x0 0xff800000 0x800000>;
	};

	board_soc: soc: soc8544@e0000000 {
		ranges = <0x0 0x0 0xe0000000 0x100000>;
	};

	pci0: pci@e0008000 {
		reg = <0 0xe0008000 0 0x1000>;
		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
		clock-frequency = <66666666>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <

			/* IDSEL 0x11 J17 Slot 1 */
			0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
			0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
			0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
			0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0

			/* IDSEL 0x12 J16 Slot 2 */

			0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
			0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
			0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
			0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
	};

	pci1: pcie@e0009000 {
		reg = <0x0 0xe0009000 0x0 0x1000>;
		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0x80000000
				  0x2000000 0x0 0x80000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x10000>;
		};
	};

	pci2: pcie@e000a000 {
		reg = <0x0 0xe000a000 0x0 0x1000>;
		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
			  0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
		pcie@0 {

Annotation

Implementation Notes