arch/powerpc/boot/dts/fsl/mpc8572ds.dts

Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/fsl/mpc8572ds.dts

File Facts

System
Linux kernel
Corpus path
arch/powerpc/boot/dts/fsl/mpc8572ds.dts
Extension
.dts
Size
1998 bytes
Lines
87
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * MPC8572 DS Device Tree Source
 *
 * Copyright 2007-2009 Freescale Semiconductor Inc.
 */

/include/ "mpc8572si-pre.dtsi"

/ {
	model = "fsl,MPC8572DS";
	compatible = "fsl,MPC8572DS";

	memory {
		device_type = "memory";
	};

	board_lbc: lbc: localbus@ffe05000 {
		reg = <0 0xffe05000 0 0x1000>;

		ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
			  0x1 0x0 0x0 0xe0000000 0x08000000
			  0x2 0x0 0x0 0xffa00000 0x00040000
			  0x3 0x0 0x0 0xffdf0000 0x00008000
			  0x4 0x0 0x0 0xffa40000 0x00040000
			  0x5 0x0 0x0 0xffa80000 0x00040000
			  0x6 0x0 0x0 0xffac0000 0x00040000>;
	};

	board_soc: soc: soc8572@ffe00000 {
		ranges = <0x0 0 0xffe00000 0x100000>;
	};

	board_pci0: pci0: pcie@ffe08000 {
		reg = <0 0xffe08000 0 0x1000>;
		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0x80000000
				  0x2000000 0x0 0x80000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x10000>;
		};
	};

	pci1: pcie@ffe09000 {
		reg = <0 0xffe09000 0 0x1000>;
		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xa0000000
				  0x2000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x10000>;
		};
	};

	pci2: pcie@ffe0a000 {
		reg = <0 0xffe0a000 0 0x1000>;
		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xc0000000
				  0x2000000 0x0 0xc0000000

Annotation

Implementation Notes