arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dts

Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dts

File Facts

System
Linux kernel
Corpus path
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dts
Extension
.dts
Size
2270 bytes
Lines
139
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * P1020 RDB-PC Core1 Device Tree Source in CAMP mode.
 *
 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
 * can be shared, all the other devices must be assigned to one core only.
 * This dts allows core1 to have l2, eth0, crypto.
 *
 * Please note to add "-b 1" for core1's dts compiling.
 *
 * Copyright 2012 Freescale Semiconductor Inc.
 */

/include/ "p1020rdb-pc_32b.dts"

/ {
	model = "fsl,P1020RDB-PC";
	compatible = "fsl,P1020RDB-PC";

	aliases {
		ethernet0 = &enet0;
		serial0 = &serial1;
		};

	cpus {
		PowerPC,P1020@0 {
			status = "disabled";
		};
	};

	memory {
		device_type = "memory";
	};

	localbus@ffe05000 {
		status = "disabled";
	};

	soc@ffe00000 {
		ecm-law@0 {
			status = "disabled";
		};

		ecm@1000 {
			status = "disabled";
		};

		memory-controller@2000 {
			status = "disabled";
		};

		i2c@3000 {
			status = "disabled";
		};

		i2c@3100 {
			status = "disabled";
		};

		serial0: serial@4500 {
			status = "disabled";
		};

		spi@7000 {
			status = "disabled";
		};

		gpio: gpio-controller@f000 {
			status = "disabled";
		};

Annotation

Implementation Notes