arch/powerpc/boot/dts/fsl/p1020rdb-pd.dts
Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/fsl/p1020rdb-pd.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dts- Extension
.dts- Size
- 7189 bytes
- Lines
- 293
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
/include/ "p1020si-pre.dtsi"
/ {
model = "fsl,P1020RDB-PD";
compatible = "fsl,P1020RDB-PD";
memory {
device_type = "memory";
};
lbc: localbus@ffe05000 {
reg = <0x0 0xffe05000 0x0 0x1000>;
/* NOR, NAND flash, L2 switch and CPLD */
ranges = <0x0 0x0 0x0 0xec000000 0x04000000
0x1 0x0 0x0 0xff800000 0x00040000
0x2 0x0 0x0 0xffa00000 0x00020000
0x3 0x0 0x0 0xffb00000 0x00020000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x4000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
/* 128KB for DTB Image */
reg = <0x0 0x00020000>;
label = "NOR DTB Image";
};
partition@20000 {
/* 3.875 MB for Linux Kernel Image */
reg = <0x00020000 0x003e0000>;
label = "NOR Linux Kernel Image";
};
partition@400000 {
/* 58MB for Root file System */
reg = <0x00400000 0x03a00000>;
label = "NOR Root File System";
};
partition@3e00000 {
/* This location must not be altered */
/* 1M for Vitesse 7385 Switch firmware */
reg = <0x3e00000 0x00100000>;
label = "NOR Vitesse-7385 Firmware";
read-only;
};
partition@3f00000 {
/* This location must not be altered */
/* 512KB for u-boot Bootloader Image */
/* 512KB for u-boot Environment Variables */
reg = <0x03f00000 0x00100000>;
label = "NOR U-Boot Image";
read-only;
};
};
nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,p1020-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x40000>;
partition@0 {
Annotation
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.