arch/powerpc/boot/dts/fsl/p1025rdb_32b.dts

Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/fsl/p1025rdb_32b.dts

File Facts

System
Linux kernel
Corpus path
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dts
Extension
.dts
Size
3961 bytes
Lines
134
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

/include/ "p1021si-pre.dtsi"
/ {
	model = "fsl,P1025RDB";
	compatible = "fsl,P1025RDB";

	memory {
		device_type = "memory";
	};

	lbc: localbus@ffe05000 {
		reg = <0 0xffe05000 0 0x1000>;

		/* NOR, NAND Flashes */
		ranges = <0x0 0x0 0x0 0xef000000 0x01000000
			  0x1 0x0 0x0 0xff800000 0x00040000>;
	};

	soc: soc@ffe00000 {
		ranges = <0x0 0x0 0xffe00000 0x100000>;
	};

	pci0: pcie@ffe09000 {
		ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
		reg = <0 0xffe09000 0 0x1000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xe0000000
				  0x2000000 0x0 0xe0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;
		};
	};

	pci1: pcie@ffe0a000 {
		reg = <0 0xffe0a000 0 0x1000>;
		ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xe0000000
				  0x2000000 0x0 0xe0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;
		};
	};

	qe: qe@ffe80000 {
		ranges = <0x0 0x0 0xffe80000 0x40000>;
		reg = <0 0xffe80000 0 0x480>;
		brg-frequency = <0>;
		bus-frequency = <0>;
		status = "disabled"; /* no firmware loaded */

		enet3: ucc@2000 {
			device_type = "network";
			compatible = "ucc_geth";
			rx-clock-name = "clk12";
			tx-clock-name = "clk9";
			pio-handle = <&pio1>;
			phy-handle = <&qe_phy0>;
			phy-connection-type = "mii";
		};

		mdio@2120 {
			qe_phy0: ethernet-phy@0 {

Annotation

Implementation Notes