arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi

File Facts

System

Linux kernel

Corpus path

arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi

Extension

.dtsi

Size

2559 bytes

Lines

67

Domain

Architecture Layer

Bucket

arch/powerpc

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

dma@21300 {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "fsl,eloplus-dma";
	reg = <0x21300 0x4>;
	ranges = <0x0 0x21100 0x200>;
	cell-index = <0>;
	dma-channel@0 {
		compatible = "fsl,eloplus-dma-channel";
		reg = <0x0 0x80>;
		cell-index = <0>;
		interrupts = <20 2 0 0>;
	};
	dma-channel@80 {
		compatible = "fsl,eloplus-dma-channel";
		reg = <0x80 0x80>;
		cell-index = <1>;
		interrupts = <21 2 0 0>;
	};
	dma-channel@100 {
		compatible = "fsl,eloplus-dma-channel";
		reg = <0x100 0x80>;
		cell-index = <2>;
		interrupts = <22 2 0 0>;
	};
	dma-channel@180 {
		compatible = "fsl,eloplus-dma-channel";
		reg = <0x180 0x80>;
		cell-index = <3>;
		interrupts = <23 2 0 0>;
	};
};

Annotation

• Atlas domain: Architecture Layer / arch/powerpc.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.