arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi

File Facts

System

Linux kernel

Corpus path

arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi

Extension

.dtsi

Size

2518 bytes

Lines

69

Domain

Architecture Layer

Bucket

arch/powerpc

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

fman@400000 {
	fman0_rx_0x0b: port@8b000 {
		cell-index = <0xb>;
		compatible = "fsl,fman-v2-port-rx";
		reg = <0x8b000 0x1000>;
	};

	fman0_tx_0x2b: port@ab000 {
		cell-index = <0x2b>;
		compatible = "fsl,fman-v2-port-tx";
		reg = <0xab000 0x1000>;
	};

	ethernet@e6000 {
		cell-index = <3>;
		compatible = "fsl,fman-dtsec";
		reg = <0xe6000 0x1000>;
		fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
		tbi-handle = <&tbi3>;
		ptp-timer = <&ptp_timer0>;
	};

	mdio@e7120 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,fman-mdio";
		reg = <0xe7120 0xee0>;

		tbi3: tbi-phy@8 {
			reg = <0x8>;
			device_type = "tbi-phy";
		};
	};
};

Annotation

• Atlas domain: Architecture Layer / arch/powerpc.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.