arch/powerpc/boot/dts/mpc5125twr.dts
Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/mpc5125twr.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/boot/dts/mpc5125twr.dts- Extension
.dts- Size
- 6713 bytes
- Lines
- 294
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/mpc512x-clock.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* STx/Freescale ADS5125 MPC5125 silicon
*
* Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved.
*
* Reworked by Matteo Facchinetti (engineering@sirius-es.it)
* Copyright (C) 2013 Sirius Electronic Systems
*/
#include <dt-bindings/clock/mpc512x-clock.h>
/dts-v1/;
/ {
model = "mpc5125twr"; // In BSP "mpc5125ads"
compatible = "fsl,mpc5125ads", "fsl,mpc5125";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&ipic>;
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
ethernet0 = ð0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5125@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <0x20>; // 32 bytes
i-cache-line-size = <0x20>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
bus-frequency = <198000000>; // 198 MHz csb bus
clock-frequency = <396000000>; // 396 MHz ppc core
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; // 256MB at 0
};
sram@30000000 {
compatible = "fsl,mpc5121-sram";
reg = <0x30000000 0x08000>; // 32K at 0x30000000
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc: osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33000000>;
};
};
soc@80000000 {
compatible = "fsl,mpc5121-immr";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x80000000 0x400000>;
Annotation
- Immediate include surface: `dt-bindings/clock/mpc512x-clock.h`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.