arch/powerpc/boot/dts/tqm8548-bigflash.dts

Source file repositories/reference/linux-study-clean/arch/powerpc/boot/dts/tqm8548-bigflash.dts

File Facts

System
Linux kernel
Corpus path
arch/powerpc/boot/dts/tqm8548-bigflash.dts
Extension
.dts
Size
11217 bytes
Lines
496
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * TQM8548 Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
 */

/dts-v1/;

/ {
	model = "tqc,tqm8548";
	compatible = "tqc,tqm8548";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;

		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8548@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;	// L1, 32K
			i-cache-size = <0x8000>;	// L1, 32K
			next-level-cache = <&L2>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000>;	// Filled in by U-Boot
	};

	soc@a0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		ranges = <0x0 0xa0000000 0x100000>;
		bus-frequency = <0>;
		compatible = "fsl,mpc8548-immr", "simple-bus";

		ecm-law@0 {
			compatible = "fsl,ecm-law";
			reg = <0x0 0x1000>;
			fsl,num-laws = <10>;
		};

		ecm@1000 {
			compatible = "fsl,mpc8548-ecm", "fsl,ecm";
			reg = <0x1000 0x1000>;
			interrupts = <17 2>;
			interrupt-parent = <&mpic>;
		};

		memory-controller@2000 {

Annotation

Implementation Notes