arch/powerpc/include/asm/book3s/64/kexec.h
Source file repositories/reference/linux-study-clean/arch/powerpc/include/asm/book3s/64/kexec.h
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/include/asm/book3s/64/kexec.h- Extension
.h- Size
- 653 bytes
- Lines
- 34
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/plpar_wrappers.h
Detected Declarations
function reset_sprs
Annotated Snippet
#ifndef _ASM_POWERPC_BOOK3S_64_KEXEC_H_
#define _ASM_POWERPC_BOOK3S_64_KEXEC_H_
#include <asm/plpar_wrappers.h>
#define reset_sprs reset_sprs
static inline void reset_sprs(void)
{
if (cpu_has_feature(CPU_FTR_ARCH_206)) {
mtspr(SPRN_AMR, 0);
mtspr(SPRN_UAMOR, 0);
}
if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
mtspr(SPRN_IAMR, 0);
if (cpu_has_feature(CPU_FTR_HVMODE))
mtspr(SPRN_CIABR, 0);
else
plpar_set_ciabr(0);
}
if (cpu_has_feature(CPU_FTR_ARCH_31)) {
mtspr(SPRN_DEXCR, 0);
mtspr(SPRN_HASHKEYR, 0);
}
/* Do we need isync()? We are going via a kexec reset */
isync();
}
#endif
Annotation
- Immediate include surface: `asm/plpar_wrappers.h`.
- Detected declarations: `function reset_sprs`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.