arch/powerpc/include/asm/book3s/64/mmu-hash.h
Source file repositories/reference/linux-study-clean/arch/powerpc/include/asm/book3s/64/mmu-hash.h
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/include/asm/book3s/64/mmu-hash.h- Extension
.h- Size
- 28921 bytes
- Lines
- 885
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/page.hasm/bug.hasm/asm-const.hasm/book3s/64/pgtable.hasm/book3s/64/slice.hasm/task_size_64.hasm/cpu_has_feature.h
Detected Declarations
struct mmu_hash_opsstruct hash_ptestruct mm_structstruct slb_entrystruct subpage_prot_tablestruct slice_maskstruct hash_mm_contextenum slb_indexfunction shift_to_mmu_psizefunction mmu_psize_to_shiftfunction ap_to_shiftfunction get_sllp_encodingfunction Pagefunction segment_shiftfunction __hpte_page_sizefunction hpte_page_sizefunction hpte_base_page_sizefunction hpte_encode_avpnfunction hpte_old_to_new_vfunction hpte_old_to_new_rfunction hpte_new_to_old_vfunction hpte_new_to_old_rfunction hpte_get_old_vfunction hpte_encode_vfunction hpte_encode_rfunction hpt_vpnfunction hpt_hashfunction __hash_page_thpfunction hpte_init_pseriesfunction slb_set_sizefunction subpage_prot_freefunction vsid_scramblefunction user_segment_sizefunction get_vsidfunction get_kernel_contextfunction get_kernel_vsidfunction mk_esid_datafunction __mk_vsid_datafunction mk_vsid_data
Annotated Snippet
struct mmu_hash_ops {
void (*hpte_invalidate)(unsigned long slot,
unsigned long vpn,
int bpsize, int apsize,
int ssize, int local);
long (*hpte_updatepp)(unsigned long slot,
unsigned long newpp,
unsigned long vpn,
int bpsize, int apsize,
int ssize, unsigned long flags);
void (*hpte_updateboltedpp)(unsigned long newpp,
unsigned long ea,
int psize, int ssize);
long (*hpte_insert)(unsigned long hpte_group,
unsigned long vpn,
unsigned long prpn,
unsigned long rflags,
unsigned long vflags,
int psize, int apsize,
int ssize);
long (*hpte_remove)(unsigned long hpte_group);
int (*hpte_removebolted)(unsigned long ea,
int psize, int ssize);
void (*flush_hash_range)(unsigned long number, int local);
void (*hugepage_invalidate)(unsigned long vsid,
unsigned long addr,
unsigned char *hpte_slot_array,
int psize, int ssize, int local);
int (*resize_hpt)(unsigned long shift);
/*
* Special for kexec.
* To be called in real mode with interrupts disabled. No locks are
* taken as such, concurrent access on pre POWER5 hardware could result
* in a deadlock.
* The linear mapping is destroyed as well.
*/
void (*hpte_clear_all)(void);
};
extern struct mmu_hash_ops mmu_hash_ops;
struct hash_pte {
__be64 v;
__be64 r;
};
extern struct hash_pte *htab_address;
extern unsigned long htab_size_bytes;
extern unsigned long htab_hash_mask;
static inline int shift_to_mmu_psize(unsigned int shift)
{
int psize;
for (psize = 0; psize < MMU_PAGE_COUNT; ++psize)
if (mmu_psize_defs[psize].shift == shift)
return psize;
return -1;
}
static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
{
if (mmu_psize_defs[mmu_psize].shift)
return mmu_psize_defs[mmu_psize].shift;
BUG();
}
static inline unsigned int ap_to_shift(unsigned long ap)
{
int psize;
for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
if (mmu_psize_defs[psize].ap == ap)
return mmu_psize_defs[psize].shift;
}
return -1;
}
static inline unsigned long get_sllp_encoding(int psize)
{
unsigned long sllp;
sllp = ((mmu_psize_defs[psize].sllp & SLB_VSID_L) >> 6) |
((mmu_psize_defs[psize].sllp & SLB_VSID_LP) >> 4);
return sllp;
}
#endif /* __ASSEMBLER__ */
Annotation
- Immediate include surface: `asm/page.h`, `asm/bug.h`, `asm/asm-const.h`, `asm/book3s/64/pgtable.h`, `asm/book3s/64/slice.h`, `asm/task_size_64.h`, `asm/cpu_has_feature.h`.
- Detected declarations: `struct mmu_hash_ops`, `struct hash_pte`, `struct mm_struct`, `struct slb_entry`, `struct subpage_prot_table`, `struct slice_mask`, `struct hash_mm_context`, `enum slb_index`, `function shift_to_mmu_psize`, `function mmu_psize_to_shift`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.