arch/powerpc/include/asm/cputhreads.h
Source file repositories/reference/linux-study-clean/arch/powerpc/include/asm/cputhreads.h
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/include/asm/cputhreads.h- Extension
.h- Size
- 2862 bytes
- Lines
- 116
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/cpumask.hasm/cpu_has_feature.h
Detected Declarations
function cpu_nr_coresfunction cpu_core_index_of_threadfunction cpu_first_thread_of_corefunction cpu_thread_in_corefunction cpu_thread_in_subcorefunction cpu_first_thread_siblingfunction cpu_last_thread_siblingfunction cpu_first_tlb_thread_siblingfunction cpu_last_tlb_thread_siblingfunction cpu_tlb_thread_sibling_stepfunction get_tensr
Annotated Snippet
static inline int cpu_core_index_of_thread(int cpu) { return cpu; }
static inline int cpu_first_thread_of_core(int core) { return core; }
#endif
static inline int cpu_thread_in_core(int cpu)
{
return cpu & (threads_per_core - 1);
}
static inline int cpu_thread_in_subcore(int cpu)
{
return cpu & (threads_per_subcore - 1);
}
static inline int cpu_first_thread_sibling(int cpu)
{
return cpu & ~(threads_per_core - 1);
}
static inline int cpu_last_thread_sibling(int cpu)
{
return cpu | (threads_per_core - 1);
}
/*
* tlb_thread_siblings are siblings which share a TLB. This is not
* architected, is not something a hypervisor could emulate and a future
* CPU may change behaviour even in compat mode, so this should only be
* used on PowerNV, and only with care.
*/
static inline int cpu_first_tlb_thread_sibling(int cpu)
{
if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
return cpu & ~0x6; /* Big Core */
else
return cpu_first_thread_sibling(cpu);
}
static inline int cpu_last_tlb_thread_sibling(int cpu)
{
if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
return cpu | 0x6; /* Big Core */
else
return cpu_last_thread_sibling(cpu);
}
static inline int cpu_tlb_thread_sibling_step(void)
{
if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
return 2; /* Big Core */
else
return 1;
}
static inline u32 get_tensr(void)
{
#ifdef CONFIG_BOOKE
if (cpu_has_feature(CPU_FTR_SMT))
return mfspr(SPRN_TENSR);
#endif
return 1;
}
void book3e_start_thread(int thread, unsigned long addr);
void book3e_stop_thread(int thread);
#endif /* __ASSEMBLER__ */
#define INVALID_THREAD_HWID 0x0fff
#endif /* _ASM_POWERPC_CPUTHREADS_H */
Annotation
- Immediate include surface: `linux/cpumask.h`, `asm/cpu_has_feature.h`.
- Detected declarations: `function cpu_nr_cores`, `function cpu_core_index_of_thread`, `function cpu_first_thread_of_core`, `function cpu_thread_in_core`, `function cpu_thread_in_subcore`, `function cpu_first_thread_sibling`, `function cpu_last_thread_sibling`, `function cpu_first_tlb_thread_sibling`, `function cpu_last_tlb_thread_sibling`, `function cpu_tlb_thread_sibling_step`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.