arch/powerpc/include/asm/hmi.h
Source file repositories/reference/linux-study-clean/arch/powerpc/include/asm/hmi.h
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/include/asm/hmi.h- Extension
.h- Size
- 971 bytes
- Lines
- 38
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct sibling_subcore_statestruct pt_regsfunction wait_for_subcore_guest_exit
Annotated Snippet
struct sibling_subcore_state {
unsigned long flags;
u8 in_guest[MAX_SUBCORE_PER_CORE];
};
extern void wait_for_subcore_guest_exit(void);
extern void wait_for_tb_resync(void);
#else
static inline void wait_for_subcore_guest_exit(void) { }
static inline void wait_for_tb_resync(void) { }
#endif
struct pt_regs;
extern long hmi_handle_debugtrig(struct pt_regs *regs);
#endif /* __ASM_PPC64_HMI_H__ */
Annotation
- Detected declarations: `struct sibling_subcore_state`, `struct pt_regs`, `function wait_for_subcore_guest_exit`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.