arch/powerpc/include/asm/nohash/mmu-e500.h

Source file repositories/reference/linux-study-clean/arch/powerpc/include/asm/nohash/mmu-e500.h

File Facts

System
Linux kernel
Corpus path
arch/powerpc/include/asm/nohash/mmu-e500.h
Extension
.h
Size
9658 bytes
Lines
324
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct tlb_core_data {
	/*
	 * Per-core spinlock for e6500 TLB handlers (no tlbsrx.)
	 * Must be the first struct element.
	 */
	u8 lock;

	/* For software way selection, as on Freescale TLB1 */
	u8 esel_next, esel_max, esel_first;
};

#ifdef CONFIG_PPC64
extern unsigned long linear_map_top;
extern int book3e_htw_mode;

#define PPC_HTW_NONE	0
#define PPC_HTW_E6500	1

/*
 * 64-bit booke platforms don't load the tlb in the tlb miss handler code.
 * HUGETLB_NEED_PRELOAD handles this - it causes huge_ptep_set_access_flags to
 * return 1, indicating that the tlb requires preloading.
 */
#define HUGETLB_NEED_PRELOAD

#define mmu_cleanup_all NULL

#define MAX_PHYSMEM_BITS        44

#endif

#include <asm/percpu.h>
DECLARE_PER_CPU(int, next_tlbcam_idx);

#endif /* !__ASSEMBLER__ */

#endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */

Annotation

Implementation Notes