arch/powerpc/include/asm/processor.h
Source file repositories/reference/linux-study-clean/arch/powerpc/include/asm/processor.h
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/include/asm/processor.h- Extension
.h- Size
- 13382 bytes
- Lines
- 465
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
vdso/processor.hasm/reg.hlinux/types.hlinux/thread_info.hasm/ptrace.hasm/hw_breakpoint.hasm/task_size_64.hasm/task_size_32.h
Detected Declarations
struct task_structstruct thread_fp_statestruct thread_vr_statestruct debug_regstruct thread_structenum idle_boot_overridefunction __unpack_fe01function __pack_fe01function prefetchfunction prefetchw
Annotated Snippet
struct thread_fp_state {
u64 fpr[32][TS_FPRWIDTH] __attribute__((aligned(16)));
u64 fpscr; /* Floating point status */
};
/* Complete AltiVec register set including VSCR */
struct thread_vr_state {
vector128 vr[32] __attribute__((aligned(16)));
vector128 vscr __attribute__((aligned(16)));
};
struct debug_reg {
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
/*
* The following help to manage the use of Debug Control Registers
* om the BookE platforms.
*/
uint32_t dbcr0;
uint32_t dbcr1;
#ifdef CONFIG_BOOKE
uint32_t dbcr2;
#endif
/*
* The stored value of the DBSR register will be the value at the
* last debug interrupt. This register can only be read from the
* user (will never be written to) and has value while helping to
* describe the reason for the last debug trap. Torez
*/
uint32_t dbsr;
/*
* The following will contain addresses used by debug applications
* to help trace and trap on particular address locations.
* The bits in the Debug Control Registers above help define which
* of the following registers will contain valid data and/or addresses.
*/
unsigned long iac1;
unsigned long iac2;
#if CONFIG_PPC_ADV_DEBUG_IACS > 2
unsigned long iac3;
unsigned long iac4;
#endif
unsigned long dac1;
unsigned long dac2;
#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
unsigned long dvc1;
unsigned long dvc2;
#endif
#endif
};
struct thread_struct {
unsigned long ksp; /* Kernel stack pointer */
#ifdef CONFIG_PPC64
unsigned long ksp_vsid;
#endif
struct pt_regs *regs; /* Pointer to saved register state */
#ifdef CONFIG_BOOKE
/* BookE base exception scratch space; align on cacheline */
unsigned long normsave[8] ____cacheline_aligned;
#endif
#ifdef CONFIG_PPC32
void *pgdir; /* root of page-table tree */
#ifdef CONFIG_PPC_RTAS
unsigned long rtas_sp; /* stack pointer for when in RTAS */
#endif
#if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP)
unsigned long kuap; /* opened segments for user access */
#endif
unsigned long srr0;
unsigned long srr1;
unsigned long dar;
unsigned long dsisr;
#ifdef CONFIG_PPC_BOOK3S_32
unsigned long r0, r3, r4, r5, r6, r8, r9, r11;
unsigned long lr, ctr;
unsigned long sr0;
#endif
#endif /* CONFIG_PPC32 */
#if defined(CONFIG_BOOKE) && defined(CONFIG_PPC_KUAP)
unsigned long pid; /* value written in PID reg. at interrupt exit */
#endif
/* Debug Registers */
struct debug_reg debug;
#ifdef CONFIG_PPC_FPU_REGS
struct thread_fp_state fp_state;
struct thread_fp_state *fp_save_area;
#endif
int fpexc_mode; /* floating-point exception mode */
unsigned int align_ctl; /* alignment handling control */
Annotation
- Immediate include surface: `vdso/processor.h`, `asm/reg.h`, `linux/types.h`, `linux/thread_info.h`, `asm/ptrace.h`, `asm/hw_breakpoint.h`, `asm/task_size_64.h`, `asm/task_size_32.h`.
- Detected declarations: `struct task_struct`, `struct thread_fp_state`, `struct thread_vr_state`, `struct debug_reg`, `struct thread_struct`, `enum idle_boot_override`, `function __unpack_fe01`, `function __pack_fe01`, `function prefetch`, `function prefetchw`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.