arch/powerpc/include/asm/ps3gpu.h
Source file repositories/reference/linux-study-clean/arch/powerpc/include/asm/ps3gpu.h
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/include/asm/ps3gpu.h- Extension
.h- Size
- 1928 bytes
- Lines
- 75
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/mutex.hasm/lv1call.h
Detected Declarations
function lv1_gpu_display_syncfunction lv1_gpu_display_flipfunction lv1_gpu_fb_setupfunction lv1_gpu_fb_blitfunction lv1_gpu_fb_close
Annotated Snippet
#ifndef _ASM_POWERPC_PS3GPU_H
#define _ASM_POWERPC_PS3GPU_H
#include <linux/mutex.h>
#include <asm/lv1call.h>
#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
#define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
#define L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE 0x603
#define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32)
#define L1GPU_DISPLAY_SYNC_HSYNC 1
#define L1GPU_DISPLAY_SYNC_VSYNC 2
/* mutex synchronizing GPU accesses and video mode changes */
extern struct mutex ps3_gpu_mutex;
static inline int lv1_gpu_display_sync(u64 context_handle, u64 head,
u64 ddr_offset)
{
return lv1_gpu_context_attribute(context_handle,
L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
head, ddr_offset, 0, 0);
}
static inline int lv1_gpu_display_flip(u64 context_handle, u64 head,
u64 ddr_offset)
{
return lv1_gpu_context_attribute(context_handle,
L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
head, ddr_offset, 0, 0);
}
static inline int lv1_gpu_fb_setup(u64 context_handle, u64 xdr_lpar,
u64 xdr_size, u64 ioif_offset)
{
return lv1_gpu_context_attribute(context_handle,
L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
xdr_lpar, xdr_size, ioif_offset, 0);
}
static inline int lv1_gpu_fb_blit(u64 context_handle, u64 ddr_offset,
u64 ioif_offset, u64 sync_width, u64 pitch)
{
return lv1_gpu_context_attribute(context_handle,
L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
ddr_offset, ioif_offset, sync_width,
pitch);
}
static inline int lv1_gpu_fb_close(u64 context_handle)
{
return lv1_gpu_context_attribute(context_handle,
L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE, 0,
0, 0, 0);
}
#endif /* _ASM_POWERPC_PS3GPU_H */
Annotation
- Immediate include surface: `linux/mutex.h`, `asm/lv1call.h`.
- Detected declarations: `function lv1_gpu_display_sync`, `function lv1_gpu_display_flip`, `function lv1_gpu_fb_setup`, `function lv1_gpu_fb_blit`, `function lv1_gpu_fb_close`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.