arch/powerpc/include/asm/runlatch.h

File Facts

System

Linux kernel

Corpus path

arch/powerpc/include/asm/runlatch.h

Extension

.h

Size

1180 bytes

Lines

45

Domain

Architecture Layer

Bucket

arch/powerpc

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

test_thread_local_flags(_TLF_RUNLATCH)) {	\
			__hard_irq_disable();			\
			__ppc64_runlatch_off();			\
			if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) \
				__hard_irq_enable();		\
		}      						\
	} while (0)

#define ppc64_runlatch_on()					\
	do {							\
		if (cpu_has_feature(CPU_FTR_CTRL) &&		\
		    !test_thread_local_flags(_TLF_RUNLATCH)) {	\
			__hard_irq_disable();			\
			__ppc64_runlatch_on();			\
			if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) \
				__hard_irq_enable();		\
		}      						\
	} while (0)
#else
#define ppc64_runlatch_on()
#define ppc64_runlatch_off()
#endif /* CONFIG_PPC64 */

#endif /* _ASM_POWERPC_RUNLATCH_H */

Annotation

• Atlas domain: Architecture Layer / arch/powerpc.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.