arch/powerpc/include/uapi/asm/papr-physical-attestation.h

Source file repositories/reference/linux-study-clean/arch/powerpc/include/uapi/asm/papr-physical-attestation.h

File Facts

System: Linux kernel
Corpus path: arch/powerpc/include/uapi/asm/papr-physical-attestation.h
Extension: .h
Size: 854 bytes
Lines: 32
Domain: Architecture Layer
Bucket: arch/powerpc
Inferred role: Architecture Layer: implementation source
Status: source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/types.h
asm/ioctl.h
asm/papr-miscdev.h

Detected Declarations

struct papr_phy_attest_io_block

Annotated Snippet

struct papr_phy_attest_io_block {
	__u8 version;
	__u8 command;
	__u8 TCG_major_ver;
	__u8 TCG_minor_ver;
	__be32 length;
	__be32 correlator;
	__u8 payload[PAPR_PHYATTEST_MAX_INPUT];
};

/*
 * ioctl for /dev/papr-physical-attestation. Returns a attestation
 * command fd handle
 */
#define PAPR_PHY_ATTEST_IOC_HANDLE _IOW(PAPR_MISCDEV_IOC_ID, 8, struct papr_phy_attest_io_block)

#endif /* _UAPI_PAPR_PHYSICAL_ATTESTATION_H_ */

Annotation

Immediate include surface: `linux/types.h`, `asm/ioctl.h`, `asm/papr-miscdev.h`.
Detected declarations: `struct papr_phy_attest_io_block`.
Atlas domain: Architecture Layer / arch/powerpc.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.