arch/powerpc/include/uapi/asm/sigcontext.h
Source file repositories/reference/linux-study-clean/arch/powerpc/include/uapi/asm/sigcontext.h
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/include/uapi/asm/sigcontext.h- Extension
.h- Size
- 4444 bytes
- Lines
- 93
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/compiler.hasm/ptrace.hasm/elf.h
Detected Declarations
struct sigcontext
Annotated Snippet
struct sigcontext {
unsigned long _unused[4];
int signal;
#ifdef __powerpc64__
int _pad0;
#endif
unsigned long handler;
unsigned long oldmask;
#ifdef __KERNEL__
struct user_pt_regs __user *regs;
#else
struct pt_regs *regs;
#endif
#ifdef __powerpc64__
elf_gregset_t gp_regs;
elf_fpregset_t fp_regs;
/*
* To maintain compatibility with current implementations the sigcontext is
* extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
* followed by an unstructured (vmx_reserve) field of 101 doublewords. This
* allows the array of vector registers to be quadword aligned independent of
* the alignment of the containing sigcontext or ucontext. It is the
* responsibility of the code setting the sigcontext to set this pointer to
* either NULL (if this processor does not support the VMX feature) or the
* address of the first quadword within the allocated (vmx_reserve) area.
*
* The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with
* an array of 34 quadword entries (elf_vrregset_t). The entries with
* indexes 0-31 contain the corresponding vector registers. The entry with
* index 32 contains the vscr as the last word (offset 12) within the
* quadword. This allows the vscr to be stored as either a quadword (since
* it must be copied via a vector register to/from storage) or as a word.
* The entry with index 33 contains the vrsave as the first word (offset 0)
* within the quadword.
*
* Part of the VSX data is stored here also by extending vmx_restore
* by an additional 32 double words. Architecturally the layout of
* the VSR registers and how they overlap on top of the legacy FPR and
* VR registers is shown below:
*
* VSR doubleword 0 VSR doubleword 1
* ----------------------------------------------------------------
* VSR[0] | FPR[0] | |
* ----------------------------------------------------------------
* VSR[1] | FPR[1] | |
* ----------------------------------------------------------------
* | ... | |
* | ... | |
* ----------------------------------------------------------------
* VSR[30] | FPR[30] | |
* ----------------------------------------------------------------
* VSR[31] | FPR[31] | |
* ----------------------------------------------------------------
* VSR[32] | VR[0] |
* ----------------------------------------------------------------
* VSR[33] | VR[1] |
* ----------------------------------------------------------------
* | ... |
* | ... |
* ----------------------------------------------------------------
* VSR[62] | VR[30] |
* ----------------------------------------------------------------
* VSR[63] | VR[31] |
* ----------------------------------------------------------------
*
* FPR/VSR 0-31 doubleword 0 is stored in fp_regs, and VMX/VSR 32-63
* is stored at the start of vmx_reserve. vmx_reserve is extended for
* backwards compatility to store VSR 0-31 doubleword 1 after the VMX
* registers and vscr/vrsave.
*/
elf_vrreg_t __user *v_regs;
long vmx_reserve[ELF_NVRREG + ELF_NVRREG + 1 + 32];
#endif
};
#endif /* _ASM_POWERPC_SIGCONTEXT_H */
Annotation
- Immediate include surface: `linux/compiler.h`, `asm/ptrace.h`, `asm/elf.h`.
- Detected declarations: `struct sigcontext`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.