arch/powerpc/kernel/cpu_setup_6xx.S
Source file repositories/reference/linux-study-clean/arch/powerpc/kernel/cpu_setup_6xx.S
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/kernel/cpu_setup_6xx.S- Extension
.S- Size
- 12010 bytes
- Lines
- 517
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: arch/powerpc
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/linkage.hasm/processor.hasm/page.hasm/cputable.hasm/ppc_asm.hasm/asm-offsets.hasm/cache.hasm/mmu.hasm/feature-fixups.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <linux/linkage.h>
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/cputable.h>
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/feature-fixups.h>
_GLOBAL(__setup_cpu_603)
mflr r5
BEGIN_MMU_FTR_SECTION
li r10,0
mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
BEGIN_FTR_SECTION
bl __init_fpu_registers
END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
bl setup_common_caches
/*
* This assumes that all cores using __setup_cpu_603 with
* MMU_FTR_USE_HIGH_BATS are G2_LE compatible
*/
BEGIN_MMU_FTR_SECTION
bl setup_g2_le_hid2
END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
mtlr r5
blr
_GLOBAL(__setup_cpu_604)
mflr r5
bl setup_common_caches
bl setup_604_hid0
mtlr r5
blr
_GLOBAL(__setup_cpu_750)
mflr r5
bl __init_fpu_registers
bl setup_common_caches
bl setup_750_7400_hid0
mtlr r5
blr
_GLOBAL(__setup_cpu_750cx)
mflr r5
bl __init_fpu_registers
bl setup_common_caches
bl setup_750_7400_hid0
bl setup_750cx
mtlr r5
blr
_GLOBAL(__setup_cpu_750fx)
mflr r5
bl __init_fpu_registers
bl setup_common_caches
bl setup_750_7400_hid0
bl setup_750fx
mtlr r5
blr
_GLOBAL(__setup_cpu_7400)
mflr r5
bl __init_fpu_registers
bl setup_7400_workarounds
bl setup_common_caches
bl setup_750_7400_hid0
mtlr r5
blr
Annotation
- Immediate include surface: `linux/linkage.h`, `asm/processor.h`, `asm/page.h`, `asm/cputable.h`, `asm/ppc_asm.h`, `asm/asm-offsets.h`, `asm/cache.h`, `asm/mmu.h`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.