arch/powerpc/kernel/cpu_setup_power.c

Source file repositories/reference/linux-study-clean/arch/powerpc/kernel/cpu_setup_power.c

File Facts

System
Linux kernel
Corpus path
arch/powerpc/kernel/cpu_setup_power.c
Extension
.c
Size
5551 bytes
Lines
289
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2020, Jordan Niethe, IBM Corporation.
 *
 * This file contains low level CPU setup functions.
 * Originally written in assembly by Benjamin Herrenschmidt & various other
 * authors.
 */

#include <asm/reg.h>
#include <asm/synch.h>
#include <linux/bitops.h>
#include <asm/cputable.h>
#include <asm/cpu_setup.h>

/* Disable CPU_FTR_HVMODE and return false if MSR:HV is not set */
static bool init_hvmode_206(struct cpu_spec *t)
{
	u64 msr;

	msr = mfmsr();
	if (msr & MSR_HV)
		return true;

	t->cpu_features &= ~(CPU_FTR_HVMODE | CPU_FTR_P9_TM_HV_ASSIST);
	return false;
}

static void init_LPCR_ISA300(u64 lpcr, u64 lpes)
{
	/* POWER9 has no VRMASD */
	lpcr |= (lpes << LPCR_LPES_SH) & LPCR_LPES;
	lpcr |= LPCR_PECE0|LPCR_PECE1|LPCR_PECE2;
	lpcr |= (4ull << LPCR_DPFD_SH) & LPCR_DPFD;
	lpcr &= ~LPCR_HDICE;	/* clear HDICE */
	lpcr |= (4ull << LPCR_VC_SH);
	mtspr(SPRN_LPCR, lpcr);
	isync();
}

/*
 * Setup a sane LPCR:
 *   Called with initial LPCR and desired LPES 2-bit value
 *
 *   LPES = 0b01 (HSRR0/1 used for 0x500)
 *   PECE = 0b111
 *   DPFD = 4
 *   HDICE = 0
 *   VC = 0b100 (VPM0=1, VPM1=0, ISL=0)
 *   VRMASD = 0b10000 (L=1, LP=00)
 *
 * Other bits untouched for now
 */
static void init_LPCR_ISA206(u64 lpcr, u64 lpes)
{
	lpcr |= (0x10ull << LPCR_VRMASD_SH) & LPCR_VRMASD;
	init_LPCR_ISA300(lpcr, lpes);
}

static void init_FSCR(void)
{
	u64 fscr;

	fscr = mfspr(SPRN_FSCR);
	fscr |= FSCR_TAR|FSCR_EBB;
	mtspr(SPRN_FSCR, fscr);
}

static void init_FSCR_power9(void)
{
	u64 fscr;

	fscr = mfspr(SPRN_FSCR);
	fscr |= FSCR_SCV;
	mtspr(SPRN_FSCR, fscr);
	init_FSCR();
}

static void init_FSCR_power10(void)
{
	u64 fscr;

	fscr = mfspr(SPRN_FSCR);
	fscr |= FSCR_PREFIX;
	mtspr(SPRN_FSCR, fscr);
	init_FSCR_power9();
}

static void init_HFSCR(void)
{

Annotation

Implementation Notes