arch/powerpc/kernel/head_book3s_32.S

Source file repositories/reference/linux-study-clean/arch/powerpc/kernel/head_book3s_32.S

File Facts

System: Linux kernel
Corpus path: arch/powerpc/kernel/head_book3s_32.S
Extension: .S
Size: 32627 bytes
Lines: 1206
Domain: Architecture Layer
Bucket: arch/powerpc
Inferred role: Architecture Layer: arch/powerpc
Status: atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

linux/init.h
linux/pgtable.h
linux/linkage.h
asm/reg.h
asm/page.h
asm/mmu.h
asm/cputable.h
asm/cache.h
asm/thread_info.h
asm/ppc_asm.h
asm/asm-offsets.h
asm/ptrace.h
asm/bug.h
asm/kvm_book3s_asm.h
asm/feature-fixups.h
asm/interrupt.h
head_32.h
../kvm/book3s_rmhandlers.S

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

lis	r3,start_kernel@h
	ori	r3,r3,start_kernel@l
	mtspr	SPRN_SRR0,r3
	mtspr	SPRN_SRR1,r4
	rfi

/*
 * An undocumented "feature" of 604e requires that the v bit
 * be cleared before changing BAT values.
 *
 * Also, newer IBM firmware does not clear bat3 and 4 so
 * this makes sure it's done.
 *  -- Cort
 */
SYM_FUNC_START_LOCAL(clear_bats)
	li	r10,0

	mtspr	SPRN_DBAT0U,r10
	mtspr	SPRN_DBAT0L,r10
	mtspr	SPRN_DBAT1U,r10
	mtspr	SPRN_DBAT1L,r10
	mtspr	SPRN_DBAT2U,r10
	mtspr	SPRN_DBAT2L,r10
	mtspr	SPRN_DBAT3U,r10
	mtspr	SPRN_DBAT3L,r10
	mtspr	SPRN_IBAT0U,r10
	mtspr	SPRN_IBAT0L,r10
	mtspr	SPRN_IBAT1U,r10
	mtspr	SPRN_IBAT1L,r10
	mtspr	SPRN_IBAT2U,r10
	mtspr	SPRN_IBAT2L,r10
	mtspr	SPRN_IBAT3U,r10
	mtspr	SPRN_IBAT3L,r10
BEGIN_MMU_FTR_SECTION
	/* Here's a tweak: at this point, CPU setup have
	 * not been called yet, so HIGH_BAT_EN may not be
	 * set in HID0 for the 745x processors. However, it
	 * seems that doesn't affect our ability to actually
	 * write to these SPRs.
	 */
	mtspr	SPRN_DBAT4U,r10
	mtspr	SPRN_DBAT4L,r10
	mtspr	SPRN_DBAT5U,r10
	mtspr	SPRN_DBAT5L,r10
	mtspr	SPRN_DBAT6U,r10
	mtspr	SPRN_DBAT6L,r10
	mtspr	SPRN_DBAT7U,r10
	mtspr	SPRN_DBAT7L,r10
	mtspr	SPRN_IBAT4U,r10
	mtspr	SPRN_IBAT4L,r10
	mtspr	SPRN_IBAT5U,r10
	mtspr	SPRN_IBAT5L,r10
	mtspr	SPRN_IBAT6U,r10
	mtspr	SPRN_IBAT6L,r10
	mtspr	SPRN_IBAT7U,r10
	mtspr	SPRN_IBAT7L,r10
END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
	blr
SYM_FUNC_END(clear_bats)

_GLOBAL(update_bats)
	lis	r4, 1f@h
	ori	r4, r4, 1f@l
	tophys(r4, r4)
	mfmsr	r6
	mflr	r7
	li	r3, MSR_KERNEL & ~(MSR_IR | MSR_DR)
	rlwinm	r0, r6, 0, ~MSR_RI
	rlwinm	r0, r0, 0, ~MSR_EE
	mtmsr	r0

Annotation

Immediate include surface: `linux/init.h`, `linux/pgtable.h`, `linux/linkage.h`, `asm/reg.h`, `asm/page.h`, `asm/mmu.h`, `asm/cputable.h`, `asm/cache.h`.
Atlas domain: Architecture Layer / arch/powerpc.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.