arch/powerpc/kernel/hw_breakpoint.c
Source file repositories/reference/linux-study-clean/arch/powerpc/kernel/hw_breakpoint.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/kernel/hw_breakpoint.c- Extension
.c- Size
- 14191 bytes
- Lines
- 611
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/hw_breakpoint.hlinux/notifier.hlinux/kprobes.hlinux/percpu.hlinux/kernel.hlinux/sched.hlinux/smp.hlinux/spinlock.hlinux/debugfs.hlinux/init.hasm/hw_breakpoint.hasm/processor.hasm/sstep.hasm/debug.hasm/hvcall.hasm/inst.hlinux/uaccess.h
Detected Declarations
function hw_breakpoint_slotsfunction arch_install_hw_breakpointfunction arch_uninstall_hw_breakpointfunction is_ptrace_bpfunction arch_check_bp_in_kernelspacefunction arch_bp_generic_fieldsfunction doublewordfunction hw_breakpoint_arch_parsefunction thread_change_pcfunction is_larx_stcx_instrfunction is_octword_vsx_instrfunction handler_errorfunction larx_stcx_errfunction stepping_handlerfunction handle_p10dd1_spurious_exceptionfunction hw_breakpoint_handlerfunction do_dabrfunction single_step_dabr_instructionfunction hw_breakpoint_exceptions_notifyfunction flush_ptrace_hw_breakpointfunction hw_breakpoint_pmu_read
Annotated Snippet
if (!*slot) {
*slot = bp;
break;
}
}
if (WARN_ONCE(i == nr_wp_slots(), "Can't find any breakpoint slot"))
return -EBUSY;
/*
* Do not install DABR values if the instruction must be single-stepped.
* If so, DABR will be populated in single_step_dabr_instruction().
*/
if (!info->perf_single_step)
__set_breakpoint(i, info);
return 0;
}
/*
* Uninstall the breakpoint contained in the given counter.
*
* First we search the debug address register it uses and then we disable
* it.
*
* Atomic: we hold the counter->ctx->lock and we only handle variables
* and registers local to this cpu.
*/
void arch_uninstall_hw_breakpoint(struct perf_event *bp)
{
struct arch_hw_breakpoint null_brk = {0};
struct perf_event **slot;
int i;
for (i = 0; i < nr_wp_slots(); i++) {
slot = this_cpu_ptr(&bp_per_reg[i]);
if (*slot == bp) {
*slot = NULL;
break;
}
}
if (WARN_ONCE(i == nr_wp_slots(), "Can't find any breakpoint slot"))
return;
__set_breakpoint(i, &null_brk);
}
static bool is_ptrace_bp(struct perf_event *bp)
{
return bp->overflow_handler == ptrace_triggered;
}
/*
* Check for virtual address in kernel space.
*/
int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw)
{
return is_kernel_addr(hw->address);
}
int arch_bp_generic_fields(int type, int *gen_bp_type)
{
*gen_bp_type = 0;
if (type & HW_BRK_TYPE_READ)
*gen_bp_type |= HW_BREAKPOINT_R;
if (type & HW_BRK_TYPE_WRITE)
*gen_bp_type |= HW_BREAKPOINT_W;
if (*gen_bp_type == 0)
return -EINVAL;
return 0;
}
/*
* Watchpoint match range is always doubleword(8 bytes) aligned on
* powerpc. If the given range is crossing doubleword boundary, we
* need to increase the length such that next doubleword also get
* covered. Ex,
*
* address len = 6 bytes
* |=========.
* |------------v--|------v--------|
* | | | | | | | | | | | | | | | | |
* |---------------|---------------|
* <---8 bytes--->
*
* In this case, we should configure hw as:
* start_addr = address & ~(HW_BREAKPOINT_SIZE - 1)
* len = 16 bytes
*
Annotation
- Immediate include surface: `linux/hw_breakpoint.h`, `linux/notifier.h`, `linux/kprobes.h`, `linux/percpu.h`, `linux/kernel.h`, `linux/sched.h`, `linux/smp.h`, `linux/spinlock.h`.
- Detected declarations: `function hw_breakpoint_slots`, `function arch_install_hw_breakpoint`, `function arch_uninstall_hw_breakpoint`, `function is_ptrace_bp`, `function arch_check_bp_in_kernelspace`, `function arch_bp_generic_fields`, `function doubleword`, `function hw_breakpoint_arch_parse`, `function thread_change_pc`, `function is_larx_stcx_instr`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.