arch/powerpc/kernel/mce_power.c

File Facts

System

Linux kernel

Corpus path

arch/powerpc/kernel/mce_power.c

Extension

.c

Size

26476 bytes

Lines

792

Domain

Architecture Layer

Bucket

arch/powerpc

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h
• linux/ptrace.h
• linux/extable.h
• linux/pgtable.h
• asm/mmu.h
• asm/mce.h
• asm/machdep.h
• asm/pte-walk.h
• asm/sstep.h
• asm/exception-64s.h
• asm/extable.h
• asm/inst.h

Detected Declarations

• struct mce_ierror_table
• struct mce_derror_table
• function addr_to_pfn
• function mce_in_guest
• function flush_and_reload_slb
• function flush_erat
• function mce_flush
• function mce_find_instr_ea_and_phys
• function mce_handle_ierror
• function mce_handle_derror
• function mce_handle_ue_error
• function mce_handle_error
• function __machine_check_early_realmode_p7
• function __machine_check_early_realmode_p8
• function __machine_check_early_realmode_p9
• function cause
• function __machine_check_early_realmode_p10
• function cause

Annotated Snippet

struct mce_ierror_table {
	unsigned long srr1_mask;
	unsigned long srr1_value;
	bool nip_valid; /* nip is a valid indicator of faulting address */
	unsigned int error_type;
	unsigned int error_subtype;
	unsigned int error_class;
	unsigned int initiator;
	unsigned int severity;
	bool sync_error;
};

static const struct mce_ierror_table mce_p7_ierror_table[] = {
{ 0x00000000001c0000, 0x0000000000040000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000001c0000, 0x0000000000080000, true,
  MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000001c0000, 0x00000000000c0000, true,
  MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000001c0000, 0x0000000000100000, true,
  MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */
  MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000001c0000, 0x0000000000140000, true,
  MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000001c0000, 0x0000000000180000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000001c0000, 0x00000000001c0000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0, 0, 0, 0, 0, 0, 0 } };

static const struct mce_ierror_table mce_p8_ierror_table[] = {
{ 0x00000000081c0000, 0x0000000000040000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x0000000000080000, true,
  MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x00000000000c0000, true,
  MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000081c0000, 0x0000000000100000, true,
  MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000081c0000, 0x0000000000140000, true,
  MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000081c0000, 0x0000000000180000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH,
  MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x00000000001c0000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x0000000008000000, true,
  MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_IFETCH_TIMEOUT, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x0000000008040000, true,
  MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT,
  MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0, 0, 0, 0, 0, 0, 0 } };

static const struct mce_ierror_table mce_p9_ierror_table[] = {
{ 0x00000000081c0000, 0x0000000000040000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x0000000000080000, true,
  MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x00000000000c0000, true,
  MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000081c0000, 0x0000000000100000, true,
  MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000081c0000, 0x0000000000140000, true,
  MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
  MCE_INITIATOR_CPU,  MCE_SEV_WARNING, true },
{ 0x00000000081c0000, 0x0000000000180000, true,
  MCE_ERROR_TYPE_UE,  MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE,
  MCE_INITIATOR_CPU,  MCE_SEV_SEVERE, true },
{ 0x00000000081c0000, 0x00000000001c0000, true,
  MCE_ERROR_TYPE_RA,  MCE_RA_ERROR_IFETCH_FOREIGN, MCE_ECLASS_SOFTWARE,

Annotation

• Immediate include surface: `linux/types.h`, `linux/ptrace.h`, `linux/extable.h`, `linux/pgtable.h`, `asm/mmu.h`, `asm/mce.h`, `asm/machdep.h`, `asm/pte-walk.h`.
• Detected declarations: `struct mce_ierror_table`, `struct mce_derror_table`, `function addr_to_pfn`, `function mce_in_guest`, `function flush_and_reload_slb`, `function flush_erat`, `function mce_flush`, `function mce_find_instr_ea_and_phys`, `function mce_handle_ierror`, `function mce_handle_derror`.
• Atlas domain: Architecture Layer / arch/powerpc.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.