arch/powerpc/kernel/smp.c
Source file repositories/reference/linux-study-clean/arch/powerpc/kernel/smp.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/kernel/smp.c- Extension
.c- Size
- 45705 bytes
- Lines
- 1826
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/export.hlinux/sched/mm.hlinux/sched/task_stack.hlinux/sched/topology.hlinux/smp.hlinux/interrupt.hlinux/delay.hlinux/init.hlinux/spinlock.hlinux/cache.hlinux/err.hlinux/device.hlinux/cpu.hlinux/notifier.hlinux/topology.hlinux/profile.hlinux/processor.hlinux/random.hlinux/stackprotector.hlinux/pgtable.hlinux/clockchips.hlinux/kexec.hasm/ptrace.hlinux/atomic.hasm/irq.hasm/hw_irq.hasm/kvm_ppc.hasm/dbell.hasm/page.hasm/smp.hasm/time.h
Detected Declarations
struct thread_groupsstruct thread_groups_liststruct cpu_messagesfunction smp_generic_cpu_bootablefunction smp_generic_kick_cpufunction call_function_actionfunction reschedule_actionfunction tick_broadcast_ipi_actionfunction nmi_ipi_actionfunction smp_request_message_ipifunction smp_muxed_ipi_set_messagefunction smp_muxed_ipi_message_passfunction smp_ipi_demuxfunction smp_ipi_demux_relaxedfunction do_message_passfunction arch_smp_send_reschedulefunction arch_send_call_function_single_ipifunction arch_send_call_function_ipi_maskfunction nmi_ipi_lock_startfunction nmi_ipi_lockfunction nmi_ipi_unlockfunction nmi_ipi_unlock_endfunction smp_handle_nmi_ipifunction do_smp_send_nmi_ipifunction for_each_online_cpufunction __smp_send_nmi_ipifunction smp_send_nmi_ipifunction smp_send_safe_nmi_ipifunction tick_broadcastfunction debugger_ipi_callbackfunction smp_send_debugger_breakfunction crash_send_ipifunction for_each_present_cpufunction crash_smp_send_stopfunction nmi_stop_this_cpufunction smp_send_stopfunction stop_this_cpufunction smp_send_stopfunction smp_store_cpu_infofunction set_cpus_relatedfunction set_cpus_unrelatedfunction or_cpumasks_relatedfunction parse_thread_groupsfunction get_cpu_thread_group_startfunction get_thread_groupsfunction update_mask_from_threadgroupfunction init_thread_group_cache_mapfunction powerpc_smt_flags
Annotated Snippet
struct thread_groups {
unsigned int property;
unsigned int nr_groups;
unsigned int threads_per_group;
unsigned int thread_list[MAX_THREAD_LIST_SIZE];
};
/* Maximum number of properties that groups of threads within a core can share */
#define MAX_THREAD_GROUP_PROPERTIES 2
struct thread_groups_list {
unsigned int nr_properties;
struct thread_groups property_tgs[MAX_THREAD_GROUP_PROPERTIES];
};
static struct thread_groups_list tgl[NR_CPUS] __initdata;
/*
* On big-cores system, thread_group_l1_cache_map for each CPU corresponds to
* the set its siblings that share the L1-cache.
*/
DEFINE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
/*
* On some big-cores system, thread_group_l2_cache_map for each CPU
* corresponds to the set its siblings within the core that share the
* L2-cache.
*/
DEFINE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
/*
* On P10, thread_group_l3_cache_map for each CPU is equal to the
* thread_group_l2_cache_map
*/
DEFINE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map);
/* SMP operations for this machine */
struct smp_ops_t *smp_ops;
/* Can't be static due to PowerMac hackery */
volatile unsigned int cpu_callin_map[NR_CPUS];
int smt_enabled_at_boot = 1;
/*
* Returns 1 if the specified cpu should be brought up during boot.
* Used to inhibit booting threads if they've been disabled or
* limited on the command line
*/
int smp_generic_cpu_bootable(unsigned int nr)
{
/* Special case - we inhibit secondary thread startup
* during boot if the user requests it.
*/
if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
return 0;
if (smt_enabled_at_boot
&& cpu_thread_in_core(nr) >= smt_enabled_at_boot)
return 0;
}
return 1;
}
#ifdef CONFIG_PPC64
int smp_generic_kick_cpu(int nr)
{
if (nr < 0 || nr >= nr_cpu_ids)
return -EINVAL;
/*
* The processor is currently spinning, waiting for the
* cpu_start field to become non-zero After we set cpu_start,
* the processor will continue on to secondary_start
*/
if (!paca_ptrs[nr]->cpu_start) {
paca_ptrs[nr]->cpu_start = 1;
smp_mb();
return 0;
}
#ifdef CONFIG_HOTPLUG_CPU
/*
* Ok it's not there, so it might be soft-unplugged, let's
* try to bring it back
*/
generic_set_cpu_up(nr);
smp_wmb();
smp_send_reschedule(nr);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/export.h`, `linux/sched/mm.h`, `linux/sched/task_stack.h`, `linux/sched/topology.h`, `linux/smp.h`, `linux/interrupt.h`, `linux/delay.h`.
- Detected declarations: `struct thread_groups`, `struct thread_groups_list`, `struct cpu_messages`, `function smp_generic_cpu_bootable`, `function smp_generic_kick_cpu`, `function call_function_action`, `function reschedule_action`, `function tick_broadcast_ipi_action`, `function nmi_ipi_action`, `function smp_request_message_ipi`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.