arch/powerpc/kernel/tau_6xx.c
Source file repositories/reference/linux-study-clean/arch/powerpc/kernel/tau_6xx.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/kernel/tau_6xx.c- Extension
.c- Size
- 5686 bytes
- Lines
- 238
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/errno.hlinux/kernel.hlinux/param.hlinux/string.hlinux/mm.hlinux/interrupt.hlinux/init.hlinux/delay.hlinux/workqueue.hasm/interrupt.hasm/io.hasm/reg.hasm/nvram.hasm/cache.hasm/8xx_immap.hasm/machdep.hsetup.h
Detected Declarations
function set_thresholdsfunction TAUupdatefunction tau_timeoutfunction tau_work_funcfunction TAU_init_smpfunction TAU_initfunction cpu_temp_bothfunction cpu_tempfunction tau_interrupts
Annotated Snippet
if (tau[cpu].low >= step_size) {
tau[cpu].low -= step_size;
tau[cpu].high -= (step_size - window_expand);
}
tau[cpu].grew = 1;
pr_debug("%s: low threshold crossed\n", __func__);
}
thrm = mfspr(SPRN_THRM2);
if ((thrm & bits) == bits) {
mtspr(SPRN_THRM2, 0);
if (tau[cpu].high <= 127 - step_size) {
tau[cpu].low += (step_size - window_expand);
tau[cpu].high += step_size;
}
tau[cpu].grew = 1;
pr_debug("%s: high threshold crossed\n", __func__);
}
}
#ifdef CONFIG_TAU_INT
/*
* TAU interrupts - called when we have a thermal assist unit interrupt
* with interrupts disabled
*/
DEFINE_INTERRUPT_HANDLER_ASYNC(TAUException)
{
int cpu = smp_processor_id();
tau[cpu].interrupts++;
TAUupdate(cpu);
}
#endif /* CONFIG_TAU_INT */
static void tau_timeout(void * info)
{
int cpu;
int size;
int shrink;
cpu = smp_processor_id();
if (!tau_int_enable)
TAUupdate(cpu);
/* Stop thermal sensor comparisons and interrupts */
mtspr(SPRN_THRM3, 0);
size = tau[cpu].high - tau[cpu].low;
if (size > min_window && ! tau[cpu].grew) {
/* do an exponential shrink of half the amount currently over size */
shrink = (2 + size - min_window) / 4;
if (shrink) {
tau[cpu].low += shrink;
tau[cpu].high -= shrink;
} else { /* size must have been min_window + 1 */
tau[cpu].low += 1;
#if 1 /* debug */
if ((tau[cpu].high - tau[cpu].low) != min_window){
printk(KERN_ERR "temp.c: line %d, logic error\n", __LINE__);
}
#endif
}
}
tau[cpu].grew = 0;
set_thresholds(cpu);
/* Restart thermal sensor comparisons and interrupts.
* The "PowerPC 740 and PowerPC 750 Microprocessor Datasheet"
* recommends that "the maximum value be set in THRM3 under all
* conditions."
*/
mtspr(SPRN_THRM3, THRM3_SITV(0x1fff) | THRM3_E);
}
static struct workqueue_struct *tau_workq;
static void tau_work_func(struct work_struct *work)
{
msleep(shrink_timer);
on_each_cpu(tau_timeout, NULL, 0);
/* schedule ourselves to be run again */
queue_work(tau_workq, work);
}
static DECLARE_WORK(tau_work, tau_work_func);
Annotation
- Immediate include surface: `linux/errno.h`, `linux/kernel.h`, `linux/param.h`, `linux/string.h`, `linux/mm.h`, `linux/interrupt.h`, `linux/init.h`, `linux/delay.h`.
- Detected declarations: `function set_thresholds`, `function TAUupdate`, `function tau_timeout`, `function tau_work_func`, `function TAU_init_smp`, `function TAU_init`, `function cpu_temp_both`, `function cpu_temp`, `function tau_interrupts`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.