arch/powerpc/kvm/e500_mmu.c
Source file repositories/reference/linux-study-clean/arch/powerpc/kvm/e500_mmu.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/kvm/e500_mmu.c- Extension
.c- Size
- 24790 bytes
- Lines
- 953
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/types.hlinux/slab.hlinux/string.hlinux/kvm.hlinux/kvm_host.hlinux/highmem.hlinux/log2.hlinux/uaccess.hlinux/sched.hlinux/rwsem.hlinux/vmalloc.hlinux/hugetlb.hasm/kvm_ppc.he500.htrace_booke.htiming.he500_mmu_host.h
Detected Declarations
function Copyrightfunction tlb0_set_basefunction gtlb0_set_basefunction get_tlb_eselfunction kvmppc_e500_tlb_indexfunction kvmppc_e500_deliver_tlb_missfunction kvmppc_recalc_tlb1map_rangefunction kvmppc_need_recalc_tlb1map_rangefunction kvmppc_set_tlb1map_rangefunction kvmppc_e500_gtlbe_invalidatefunction kvmppc_e500_emul_mt_mmucsr0function kvmppc_e500_emul_tlbivaxfunction tlbilx_allfunction tlbilx_onefunction kvmppc_e500_emul_tlbilxfunction kvmppc_e500_emul_tlbrefunction kvmppc_e500_emul_tlbsxfunction kvmppc_e500_emul_tlbwefunction kvmppc_e500_tlb_searchfunction kvmppc_core_vcpu_translatefunction kvmppc_mmu_itlb_indexfunction kvmppc_mmu_dtlb_indexfunction kvmppc_mmu_itlb_missfunction kvmppc_mmu_dtlb_missfunction kvmppc_mmu_xlatefunction free_gtlbfunction kvmppc_get_sregs_e500_tlbfunction kvmppc_set_sregs_e500_tlbfunction kvmppc_get_one_reg_e500_tlbfunction kvmppc_set_one_reg_e500_tlbfunction vcpu_mmu_geometry_updatefunction kvm_vcpu_ioctl_config_tlbfunction kvm_vcpu_ioctl_dirty_tlbfunction vcpu_mmu_initfunction kvmppc_e500_tlb_initfunction kvmppc_e500_tlb_uninit
Annotated Snippet
if (type == 0 || tid == pid) {
inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
}
}
}
static void tlbilx_one(struct kvmppc_vcpu_e500 *vcpu_e500, int pid,
gva_t ea)
{
int tlbsel, esel;
for (tlbsel = 0; tlbsel < 2; tlbsel++) {
esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, -1);
if (esel >= 0) {
inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
break;
}
}
}
int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int type, gva_t ea)
{
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
int pid = get_cur_spid(vcpu);
if (type == 0 || type == 1) {
tlbilx_all(vcpu_e500, 0, pid, type);
tlbilx_all(vcpu_e500, 1, pid, type);
} else if (type == 3) {
tlbilx_one(vcpu_e500, pid, ea);
}
return EMULATE_DONE;
}
int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
{
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
int tlbsel, esel;
struct kvm_book3e_206_tlb_entry *gtlbe;
tlbsel = get_tlb_tlbsel(vcpu);
esel = get_tlb_esel(vcpu, tlbsel);
gtlbe = get_entry(vcpu_e500, tlbsel, esel);
vcpu->arch.shared->mas0 &= ~MAS0_NV(~0);
vcpu->arch.shared->mas0 |= MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
vcpu->arch.shared->mas1 = gtlbe->mas1;
vcpu->arch.shared->mas2 = gtlbe->mas2;
vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
return EMULATE_DONE;
}
int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, gva_t ea)
{
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
int as = !!get_cur_sas(vcpu);
unsigned int pid = get_cur_spid(vcpu);
int esel, tlbsel;
struct kvm_book3e_206_tlb_entry *gtlbe = NULL;
for (tlbsel = 0; tlbsel < 2; tlbsel++) {
esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
if (esel >= 0) {
gtlbe = get_entry(vcpu_e500, tlbsel, esel);
break;
}
}
if (gtlbe) {
esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1;
vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
| MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
vcpu->arch.shared->mas1 = gtlbe->mas1;
vcpu->arch.shared->mas2 = gtlbe->mas2;
vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
} else {
int victim;
/* since we only have two TLBs, only lower bit is used. */
tlbsel = vcpu->arch.shared->mas4 >> 28 & 0x1;
victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel)
| MAS0_ESEL(victim)
| MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/types.h`, `linux/slab.h`, `linux/string.h`, `linux/kvm.h`, `linux/kvm_host.h`, `linux/highmem.h`, `linux/log2.h`.
- Detected declarations: `function Copyright`, `function tlb0_set_base`, `function gtlb0_set_base`, `function get_tlb_esel`, `function kvmppc_e500_tlb_index`, `function kvmppc_e500_deliver_tlb_miss`, `function kvmppc_recalc_tlb1map_range`, `function kvmppc_need_recalc_tlb1map_range`, `function kvmppc_set_tlb1map_range`, `function kvmppc_e500_gtlbe_invalidate`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.