arch/powerpc/lib/memcmp_32.S
Source file repositories/reference/linux-study-clean/arch/powerpc/lib/memcmp_32.S
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/lib/memcmp_32.S- Extension
.S- Size
- 627 bytes
- Lines
- 46
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
Dependency Surface
linux/export.hasm/ppc_asm.h
Detected Declarations
export memcmp
Annotated Snippet
#include <linux/export.h>
#include <asm/ppc_asm.h>
.text
_GLOBAL(memcmp)
srawi. r7, r5, 2 /* Divide len by 4 */
mr r6, r3
beq- 3f
mtctr r7
li r7, 0
1: lwzx r3, r6, r7
lwzx r0, r4, r7
addi r7, r7, 4
cmplw cr0, r3, r0
bdnzt eq, 1b
bne 5f
3: andi. r3, r5, 3
beqlr
cmplwi cr1, r3, 2
blt- cr1, 4f
lhzx r3, r6, r7
lhzx r0, r4, r7
addi r7, r7, 2
subf. r3, r0, r3
beqlr cr1
bnelr
4: lbzx r3, r6, r7
lbzx r0, r4, r7
subf. r3, r0, r3
blr
5: li r3, 1
bgtlr
li r3, -1
blr
EXPORT_SYMBOL(memcmp)
Annotation
- Immediate include surface: `linux/export.h`, `asm/ppc_asm.h`.
- Detected declarations: `export memcmp`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.