arch/powerpc/mm/book3s64/hash_utils.c
Source file repositories/reference/linux-study-clean/arch/powerpc/mm/book3s64/hash_utils.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/mm/book3s64/hash_utils.c- Extension
.c- Size
- 67255 bytes
- Lines
- 2485
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/spinlock.hlinux/errno.hlinux/sched/mm.hlinux/proc_fs.hlinux/stat.hlinux/sysctl.hlinux/export.hlinux/ctype.hlinux/cache.hlinux/init.hlinux/signal.hlinux/memblock.hlinux/context_tracking.hlinux/libfdt.hlinux/pkeys.hlinux/hugetlb.hlinux/cpu.hlinux/pgtable.hlinux/debugfs.hlinux/random.hlinux/elf-randomize.hlinux/of_fdt.hlinux/kfence.hasm/interrupt.hasm/processor.hasm/mmu.hasm/mmu_context.hasm/page.hasm/pgalloc.hasm/types.hlinux/uaccess.hasm/machdep.h
Detected Declarations
struct stress_hpt_structfunction tlbiel_hash_set_isa206function tlbiel_hash_set_isa300function tlbiel_all_isa206function tlbiel_all_isa300function hash__tlbiel_allfunction kernel_map_linear_pagefunction kernel_unmap_linear_pagefunction hash_supports_debug_pageallocfunction hash_debug_pagealloc_alloc_slotsfunction hash_debug_pagealloc_add_slotfunction hash_debug_pagealloc_map_pagesfunction hash_debug_pagealloc_alloc_slotsfunction hash_kfence_alloc_poolfunction hash_kfence_map_poolfunction hash_kfence_add_slotfunction hash_kfence_map_pagesfunction hash_kfence_alloc_poolfunction hash__kernel_map_pagesfunction hash_linear_map_add_slotfunction hash_linear_map_add_slotfunction htab_bolt_mappingfunction htab_remove_mappingfunction cond_reschedfunction parse_disable_1tb_segmentsfunction parse_stress_hptfunction stress_nr_groupsfunction htab_dt_scan_seg_sizesfunction get_idx_from_shiftfunction htab_dt_scan_page_sizesfunction htab_dt_scan_hugepage_blocksfunction mmu_psize_set_default_pencfunction might_have_heafunction htab_scan_page_sizesfunction encodingfunction htab_init_page_sizesfunction htab_dt_scan_pftsizefunction htab_shift_for_mem_sizefunction htab_get_table_sizefunction resize_hpt_for_hotplugfunction hash__create_section_mappingfunction hash__remove_section_mappingfunction hash_init_partition_tablefunction stress_hpt_timer_fnfunction htab_initializefunction hash__early_init_devtreefunction hash__early_init_mmufunction hash__early_init_mmu_secondary
Annotated Snippet
struct stress_hpt_struct {
unsigned long last_group[STRESS_MAX_GROUPS];
};
static inline int stress_nr_groups(void)
{
/*
* LPAR H_REMOVE flushes TLB, so need some number > 1 of entries
* to allow practical forward progress. Bare metal returns 1, which
* seems to help uncover more bugs.
*/
if (firmware_has_feature(FW_FEATURE_LPAR))
return STRESS_MAX_GROUPS;
else
return 1;
}
static struct stress_hpt_struct *stress_hpt_struct;
static int __init htab_dt_scan_seg_sizes(unsigned long node,
const char *uname, int depth,
void *data)
{
const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
const __be32 *prop;
int size = 0;
/* We are scanning "cpu" nodes only */
if (type == NULL || strcmp(type, "cpu") != 0)
return 0;
prop = of_get_flat_dt_prop(node, "ibm,processor-segment-sizes", &size);
if (prop == NULL)
return 0;
for (; size >= 4; size -= 4, ++prop) {
if (be32_to_cpu(prop[0]) == 40) {
DBG("1T segment support detected\n");
if (disable_1tb_segments) {
DBG("1T segments disabled by command line\n");
break;
}
cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT;
return 1;
}
}
cur_cpu_spec->mmu_features &= ~MMU_FTR_NO_SLBIE_B;
return 0;
}
static int __init get_idx_from_shift(unsigned int shift)
{
int idx = -1;
switch (shift) {
case 0xc:
idx = MMU_PAGE_4K;
break;
case 0x10:
idx = MMU_PAGE_64K;
break;
case 0x14:
idx = MMU_PAGE_1M;
break;
case 0x18:
idx = MMU_PAGE_16M;
break;
case 0x22:
idx = MMU_PAGE_16G;
break;
}
return idx;
}
static int __init htab_dt_scan_page_sizes(unsigned long node,
const char *uname, int depth,
void *data)
{
const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
const __be32 *prop;
int size = 0;
/* We are scanning "cpu" nodes only */
if (type == NULL || strcmp(type, "cpu") != 0)
return 0;
prop = of_get_flat_dt_prop(node, "ibm,segment-page-sizes", &size);
if (!prop)
return 0;
Annotation
- Immediate include surface: `linux/spinlock.h`, `linux/errno.h`, `linux/sched/mm.h`, `linux/proc_fs.h`, `linux/stat.h`, `linux/sysctl.h`, `linux/export.h`, `linux/ctype.h`.
- Detected declarations: `struct stress_hpt_struct`, `function tlbiel_hash_set_isa206`, `function tlbiel_hash_set_isa300`, `function tlbiel_all_isa206`, `function tlbiel_all_isa300`, `function hash__tlbiel_all`, `function kernel_map_linear_page`, `function kernel_unmap_linear_page`, `function hash_supports_debug_pagealloc`, `function hash_debug_pagealloc_alloc_slots`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: integration implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.