arch/powerpc/perf/power7-events-list.h

Source file repositories/reference/linux-study-clean/arch/powerpc/perf/power7-events-list.h

File Facts

System: Linux kernel
Corpus path: arch/powerpc/perf/power7-events-list.h
Extension: .h
Size: 30247 bytes
Lines: 555
Domain: Architecture Layer
Bucket: arch/powerpc
Inferred role: Architecture Layer: implementation source
Status: source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

EVENT(PM_IC_DEMAND_L2_BR_ALL,                 0x04898)
EVENT(PM_GCT_UTIL_7_TO_10_SLOTS,              0x020a0)
EVENT(PM_PMC2_SAVED,                          0x10022)
EVENT(PM_CMPLU_STALL_DFU,                     0x2003c)
EVENT(PM_VSU0_16FLOP,                         0x0a0a4)
EVENT(PM_MRK_LSU_DERAT_MISS,                  0x3d05a)
EVENT(PM_MRK_ST_CMPL,                         0x10034)
EVENT(PM_NEST_PAIR3_ADD,                      0x40881)
EVENT(PM_L2_ST_DISP,                          0x46180)
EVENT(PM_L2_CASTOUT_MOD,                      0x16180)
EVENT(PM_ISEG,                                0x020a4)
EVENT(PM_MRK_INST_TIMEO,                      0x40034)
EVENT(PM_L2_RCST_DISP_FAIL_ADDR,              0x36282)
EVENT(PM_LSU1_DC_PREF_STREAM_CONFIRM,         0x0d0b6)
EVENT(PM_IERAT_WR_64K,                        0x040be)
EVENT(PM_MRK_DTLB_MISS_16M,                   0x4d05e)
EVENT(PM_IERAT_MISS,                          0x100f6)
EVENT(PM_MRK_PTEG_FROM_LMEM,                  0x4d052)
EVENT(PM_FLOP,                                0x100f4)
EVENT(PM_THRD_PRIO_4_5_CYC,                   0x040b4)
EVENT(PM_BR_PRED_TA,                          0x040aa)
EVENT(PM_CMPLU_STALL_FXU,                     0x20014)
EVENT(PM_EXT_INT,                             0x200f8)
EVENT(PM_VSU_FSQRT_FDIV,                      0x0a888)
EVENT(PM_MRK_LD_MISS_EXPOSED_CYC,             0x1003e)
EVENT(PM_LSU1_LDF,                            0x0c086)
EVENT(PM_IC_WRITE_ALL,                        0x0488c)
EVENT(PM_LSU0_SRQ_STFWD,                      0x0c0a0)
EVENT(PM_PTEG_FROM_RL2L3_MOD,                 0x1c052)
EVENT(PM_MRK_DATA_FROM_L31_SHR,               0x1d04e)
EVENT(PM_DATA_FROM_L21_MOD,                   0x3c046)
EVENT(PM_VSU1_SCAL_DOUBLE_ISSUED,             0x0b08a)
EVENT(PM_VSU0_8FLOP,                          0x0a0a0)
EVENT(PM_POWER_EVENT1,                        0x1006e)
EVENT(PM_DISP_CLB_HELD_BAL,                   0x02092)
EVENT(PM_VSU1_2FLOP,                          0x0a09a)
EVENT(PM_LWSYNC_HELD,                         0x0209a)
EVENT(PM_PTEG_FROM_DL2L3_SHR,                 0x3c054)
EVENT(PM_INST_FROM_L21_MOD,                   0x34046)
EVENT(PM_IERAT_XLATE_WR_16MPLUS,              0x040bc)
EVENT(PM_IC_REQ_ALL,                          0x04888)
EVENT(PM_DSLB_MISS,                           0x0d090)
EVENT(PM_L3_MISS,                             0x1f082)
EVENT(PM_LSU0_L1_PREF,                        0x0d0b8)
EVENT(PM_VSU_SCALAR_SINGLE_ISSUED,            0x0b884)
EVENT(PM_LSU1_DC_PREF_STREAM_CONFIRM_STRIDE,  0x0d0be)
EVENT(PM_L2_INST,                             0x36080)
EVENT(PM_VSU0_FRSP,                           0x0a0b4)
EVENT(PM_FLUSH_DISP,                          0x02082)
EVENT(PM_PTEG_FROM_L2MISS,                    0x4c058)
EVENT(PM_VSU1_DQ_ISSUED,                      0x0b09a)
EVENT(PM_CMPLU_STALL_LSU,                     0x20012)
EVENT(PM_MRK_DATA_FROM_DMEM,                  0x1d04a)
EVENT(PM_LSU_FLUSH_ULD,                       0x0c8b0)
EVENT(PM_PTEG_FROM_LMEM,                      0x4c052)
EVENT(PM_MRK_DERAT_MISS_16M,                  0x3d05c)
EVENT(PM_THRD_ALL_RUN_CYC,                    0x2000c)
EVENT(PM_MEM0_PREFETCH_DISP,                  0x20083)
EVENT(PM_MRK_STALL_CMPLU_CYC_COUNT,           0x3003f)
EVENT(PM_DATA_FROM_DL2L3_MOD,                 0x3c04c)
EVENT(PM_VSU_FRSP,                            0x0a8b4)
EVENT(PM_MRK_DATA_FROM_L21_MOD,               0x3d046)
EVENT(PM_PMC1_OVERFLOW,                       0x20010)
EVENT(PM_VSU0_SINGLE,                         0x0a0a8)
EVENT(PM_MRK_PTEG_FROM_L3MISS,                0x2d058)
EVENT(PM_MRK_PTEG_FROM_L31_SHR,               0x2d056)
EVENT(PM_VSU0_VECTOR_SP_ISSUED,               0x0b090)
EVENT(PM_VSU1_FEST,                           0x0a0ba)
EVENT(PM_MRK_INST_DISP,                       0x20030)
EVENT(PM_VSU0_COMPLEX_ISSUED,                 0x0b096)
EVENT(PM_LSU1_FLUSH_UST,                      0x0c0b6)
EVENT(PM_INST_CMPL,                           0x00002)
EVENT(PM_FXU_IDLE,                            0x1000e)
EVENT(PM_LSU0_FLUSH_ULD,                      0x0c0b0)
EVENT(PM_MRK_DATA_FROM_DL2L3_MOD,             0x3d04c)
EVENT(PM_LSU_LMQ_SRQ_EMPTY_ALL_CYC,           0x3001c)
EVENT(PM_LSU1_REJECT_LMQ_FULL,                0x0c0a6)
EVENT(PM_INST_PTEG_FROM_L21_MOD,              0x3e056)
EVENT(PM_INST_FROM_RL2L3_MOD,                 0x14042)
EVENT(PM_SHL_CREATED,                         0x05082)
EVENT(PM_L2_ST_HIT,                           0x46182)
EVENT(PM_DATA_FROM_DMEM,                      0x1c04a)
EVENT(PM_L3_LD_MISS,                          0x2f082)
EVENT(PM_FXU1_BUSY_FXU0_IDLE,                 0x4000e)
EVENT(PM_DISP_CLB_HELD_RES,                   0x02094)
EVENT(PM_L2_SN_SX_I_DONE,                     0x36382)
EVENT(PM_GRP_CMPL,                            0x30004)
EVENT(PM_STCX_CMPL,                           0x0c098)
EVENT(PM_VSU0_2FLOP,                          0x0a098)
EVENT(PM_L3_PREF_MISS,                        0x3f082)

Annotation

Atlas domain: Architecture Layer / arch/powerpc.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.