arch/powerpc/platforms/52xx/lite5200_sleep.S

Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/52xx/lite5200_sleep.S

File Facts

System
Linux kernel
Corpus path
arch/powerpc/platforms/52xx/lite5200_sleep.S
Extension
.S
Size
8206 bytes
Lines
425
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: arch/powerpc
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <linux/linkage.h>

#include <asm/reg.h>
#include <asm/ppc_asm.h>
#include <asm/processor.h>
#include <asm/cache.h>


#define SDRAM_CTRL	0x104
#define SC_MODE_EN	(1<<31)
#define SC_CKE		(1<<30)
#define SC_REF_EN	(1<<28)
#define SC_SOFT_PRE	(1<<1)

#define GPIOW_GPIOE	0xc00
#define GPIOW_DDR	0xc08
#define GPIOW_DVO	0xc0c

#define CDM_CE		0x214
#define CDM_SDRAM	(1<<3)


/* helpers... beware: r10 and r4 are overwritten */
#define SAVE_SPRN(reg, addr)		\
	mfspr	r10, SPRN_##reg;	\
	stw	r10, ((addr)*4)(r4);

#define LOAD_SPRN(reg, addr)		\
	lwz	r10, ((addr)*4)(r4);	\
	mtspr	SPRN_##reg, r10;	\
	sync;				\
	isync;


	.data
registers:
	.space 0x5c*4
	.text

/* ---------------------------------------------------------------------- */
/* low-power mode with help of M68HLC908QT1 */

	.globl lite5200_low_power
lite5200_low_power:

	mr	r7, r3	/* save SRAM va */
	mr	r8, r4	/* save MBAR va */

	/* setup wakeup address for u-boot at physical location 0x0 */
	lis	r3, CONFIG_KERNEL_START@h
	lis	r4, lite5200_wakeup@h
	ori	r4, r4, lite5200_wakeup@l
	sub	r4, r4, r3
	stw	r4, 0(r3)


	/*
	 * save stuff BDI overwrites
	 * 0xf0 (0xe0->0x100 gets overwritten when BDI connected;
	 *   even when CONFIG_BDI_SWITCH is disabled and MMU XLAT commented; heisenbug?))
	 * WARNING: self-refresh doesn't seem to work when BDI2000 is connected,
	 *   possibly because BDI sets SDRAM registers before wakeup code does
	 */
	lis	r4, registers@h
	ori	r4, r4, registers@l
	lwz	r10, 0xf0(r3)
	stw	r10, (0x1d*4)(r4)

	/* save registers to r4 [destroys r10] */
	SAVE_SPRN(LR, 0x1c)

Annotation

Implementation Notes