arch/powerpc/platforms/52xx/mpc52xx_sleep.S

Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/52xx/mpc52xx_sleep.S

File Facts

System
Linux kernel
Corpus path
arch/powerpc/platforms/52xx/mpc52xx_sleep.S
Extension
.S
Size
2634 bytes
Lines
156
Domain
Architecture Layer
Bucket
arch/powerpc
Inferred role
Architecture Layer: arch/powerpc
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <asm/reg.h>
#include <asm/ppc_asm.h>
#include <asm/processor.h>


.text

_GLOBAL(mpc52xx_deep_sleep)
mpc52xx_deep_sleep: /* args r3-r6: SRAM, SDRAM regs, CDM regs, INTR regs */

	/* enable interrupts */
	mfmsr	r7
	ori	r7, r7, 0x8000 /* EE */
	mtmsr	r7
	sync; isync;

	li	r10, 0 /* flag that irq handler sets */

	/* enable tmr7 (or any other) interrupt */
	lwz	r8, 0x14(r6) /* intr->main_mask */
	ori	r8, r8, 0x1
	xori	r8, r8, 0x1
	stw	r8, 0x14(r6)
	sync

	/* emulate tmr7 interrupt */
	li	r8, 0x1
	stw	r8, 0x40(r6) /* intr->main_emulate */
	sync

	/* wait for it to happen */
1:
	cmpi	cr0, r10, 1
	bne	cr0, 1b

	/* lock icache */
	mfspr	r10, SPRN_HID0
	ori	r10, r10, 0x2000
	sync; isync;
	mtspr	SPRN_HID0, r10
	sync; isync;


	mflr	r9 /* save LR */

	/* jump to sram */
	mtlr	r3
	blrl

	mtlr	r9 /* restore LR */

	/* unlock icache */
	mfspr	r10, SPRN_HID0
	ori	r10, r10, 0x2000
	xori	r10, r10, 0x2000
	sync; isync;
	mtspr	SPRN_HID0, r10
	sync; isync;


	/* return to C code */
	blr


_GLOBAL(mpc52xx_ds_sram)
mpc52xx_ds_sram:
	/* put SDRAM into self-refresh */
	lwz	r8, 0x4(r4)	/* sdram->ctrl */

	oris	r8, r8, 0x8000 /* mode_en */

Annotation

Implementation Notes