arch/powerpc/platforms/83xx/misc.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/83xx/misc.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/83xx/misc.c- Extension
.c- Size
- 3212 bytes
- Lines
- 152
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/stddef.hlinux/kernel.hlinux/of_platform.hlinux/pci.hasm/debug.hasm/io.hasm/hw_irq.hasm/ipic.hasm/fixmap.hsysdev/fsl_soc.hsysdev/fsl_pci.hmm/mmu_decl.hmpc83xx.h
Detected Declarations
function mpc83xx_restart_initfunction mpc83xx_restartfunction mpc83xx_time_initfunction mpc83xx_ipic_init_IRQfunction mpc83xx_declare_of_platform_devicesfunction mpc83xx_setup_pcifunction mpc83xx_setup_archfunction machine_check_83xx
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* misc setup functions for MPC83xx
*
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/pci.h>
#include <asm/debug.h>
#include <asm/io.h>
#include <asm/hw_irq.h>
#include <asm/ipic.h>
#include <asm/fixmap.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <mm/mmu_decl.h>
#include "mpc83xx.h"
static __be32 __iomem *restart_reg_base;
static int __init mpc83xx_restart_init(void)
{
/* map reset restart_reg_baseister space */
restart_reg_base = ioremap(get_immrbase() + 0x900, 0xff);
return 0;
}
arch_initcall(mpc83xx_restart_init);
void __noreturn mpc83xx_restart(char *cmd)
{
#define RST_OFFSET 0x00000900
#define RST_PROT_REG 0x00000018
#define RST_CTRL_REG 0x0000001c
local_irq_disable();
if (restart_reg_base) {
/* enable software reset "RSTE" */
out_be32(restart_reg_base + (RST_PROT_REG >> 2), 0x52535445);
/* set software hard reset */
out_be32(restart_reg_base + (RST_CTRL_REG >> 2), 0x2);
} else {
printk (KERN_EMERG "Error: Restart registers not mapped, spinning!\n");
}
for (;;) ;
}
long __init mpc83xx_time_init(void)
{
#define SPCR_OFFSET 0x00000110
#define SPCR_TBEN 0x00400000
__be32 __iomem *spcr = ioremap(get_immrbase() + SPCR_OFFSET, 4);
__be32 tmp;
tmp = in_be32(spcr);
out_be32(spcr, tmp | SPCR_TBEN);
iounmap(spcr);
return 0;
}
void __init mpc83xx_ipic_init_IRQ(void)
{
struct device_node *np;
/* looking for fsl,pq2pro-pic which is asl compatible with fsl,ipic */
np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
if (!np)
np = of_find_node_by_type(NULL, "ipic");
if (!np)
return;
ipic_init(np, 0);
of_node_put(np);
/* Initialize the default interrupt mapping priorities,
* in case the boot rom changed something on us.
Annotation
- Immediate include surface: `linux/stddef.h`, `linux/kernel.h`, `linux/of_platform.h`, `linux/pci.h`, `asm/debug.h`, `asm/io.h`, `asm/hw_irq.h`, `asm/ipic.h`.
- Detected declarations: `function mpc83xx_restart_init`, `function mpc83xx_restart`, `function mpc83xx_time_init`, `function mpc83xx_ipic_init_IRQ`, `function mpc83xx_declare_of_platform_devices`, `function mpc83xx_setup_pci`, `function mpc83xx_setup_arch`, `function machine_check_83xx`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.