arch/powerpc/platforms/85xx/corenet_generic.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/85xx/corenet_generic.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/85xx/corenet_generic.c- Extension
.c- Size
- 4179 bytes
- Lines
- 204
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/pci.hlinux/kdev_t.hlinux/delay.hlinux/interrupt.hlinux/pgtable.hasm/time.hasm/machdep.hasm/pci-bridge.hasm/ppc-pci.hmm/mmu_decl.hasm/udbg.hasm/mpic.hasm/ehv_pic.hasm/swiotlb.hlinux/of_platform.hsysdev/fsl_soc.hsysdev/fsl_pci.hsmp.hmpc85xx.h
Detected Declarations
function Galafunction corenet_gen_setup_archfunction corenet_gen_publish_devicesfunction corenet_generic_probe
Annotated Snippet
if (of_machine_is_compatible(hv_compat)) {
ppc_md.init_IRQ = ehv_pic_init;
ppc_md.get_irq = ehv_pic_get_irq;
ppc_md.restart = fsl_hv_restart;
pm_power_off = fsl_hv_halt;
ppc_md.halt = fsl_hv_halt;
#ifdef CONFIG_SMP
/*
* Disable the timebase sync operations because we
* can't write to the timebase registers under the
* hypervisor.
*/
smp_85xx_ops.give_timebase = NULL;
smp_85xx_ops.take_timebase = NULL;
#endif
return 1;
}
}
return 0;
}
define_machine(corenet_generic) {
.name = "CoreNet Generic",
.probe = corenet_generic_probe,
.setup_arch = corenet_gen_setup_arch,
.init_IRQ = corenet_gen_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
/*
* Core reset may cause issues if using the proxy mode of MPIC.
* So, use the mixed mode of MPIC if enabling CPU hotplug.
*
* Likewise, problems have been seen with kexec when coreint is enabled.
*/
#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_KEXEC_CORE)
.get_irq = mpic_get_irq,
#else
.get_irq = mpic_get_coreint_irq,
#endif
.progress = udbg_progress,
.power_save = e500_idle,
};
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/pci.h`, `linux/kdev_t.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/pgtable.h`, `asm/time.h`, `asm/machdep.h`.
- Detected declarations: `function Gala`, `function corenet_gen_setup_arch`, `function corenet_gen_publish_devices`, `function corenet_generic_probe`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.