arch/powerpc/platforms/85xx/mpc85xx_rdb.c
Source file repositories/reference/linux-study-clean/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
File Facts
- System
- Linux kernel
- Corpus path
arch/powerpc/platforms/85xx/mpc85xx_rdb.c- Extension
.c- Size
- 5381 bytes
- Lines
- 209
- Domain
- Architecture Layer
- Bucket
- arch/powerpc
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/stddef.hlinux/kernel.hlinux/pci.hlinux/kdev_t.hlinux/delay.hlinux/seq_file.hlinux/interrupt.hlinux/of.hlinux/of_address.hlinux/fsl/guts.hasm/time.hasm/machdep.hasm/pci-bridge.hmm/mmu_decl.hasm/udbg.hasm/mpic.hsoc/fsl/qe/qe.hsysdev/fsl_soc.hsysdev/fsl_pci.hsmp.hmpc85xx.h
Detected Declarations
function mpc85xx_rdb_pic_initfunction mpc85xx_rdb_setup_arch
Annotated Snippet
if (np) {
guts = of_iomap(np, 0);
if (!guts) {
pr_err("mpc85xx-rdb: could not map global utilities register\n");
} else {
/* P1025 has pins muxed for QE and other functions. To
* enable QE UEC mode, we need to set bit QE0 for UCC1
* in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
* and QE12 for QE MII management signals in PMUXCR
* register.
*/
setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
MPC85xx_PMUXCR_QE(3) |
MPC85xx_PMUXCR_QE(9) |
MPC85xx_PMUXCR_QE(12));
iounmap(guts);
}
of_node_put(np);
}
}
#endif
pr_info("MPC85xx RDB board from Freescale Semiconductor\n");
}
machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
define_machine(p1020_rdb) {
.name = "P1020 RDB",
.compatible = "fsl,P1020RDB",
.setup_arch = mpc85xx_rdb_setup_arch,
.init_IRQ = mpc85xx_rdb_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.progress = udbg_progress,
};
define_machine(p1021_rdb_pc) {
.name = "P1021 RDB-PC",
.compatible = "fsl,P1021RDB-PC",
.setup_arch = mpc85xx_rdb_setup_arch,
.init_IRQ = mpc85xx_rdb_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.progress = udbg_progress,
};
define_machine(p1025_rdb) {
.name = "P1025 RDB",
.compatible = "fsl,P1025RDB",
.setup_arch = mpc85xx_rdb_setup_arch,
.init_IRQ = mpc85xx_rdb_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.progress = udbg_progress,
};
define_machine(p1020_mbg_pc) {
.name = "P1020 MBG-PC",
.compatible = "fsl,P1020MBG-PC",
.setup_arch = mpc85xx_rdb_setup_arch,
.init_IRQ = mpc85xx_rdb_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.progress = udbg_progress,
};
define_machine(p1020_utm_pc) {
Annotation
- Immediate include surface: `linux/stddef.h`, `linux/kernel.h`, `linux/pci.h`, `linux/kdev_t.h`, `linux/delay.h`, `linux/seq_file.h`, `linux/interrupt.h`, `linux/of.h`.
- Detected declarations: `function mpc85xx_rdb_pic_init`, `function mpc85xx_rdb_setup_arch`.
- Atlas domain: Architecture Layer / arch/powerpc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.